Thin oxides with in situ native oxide removal [n-MOSFETs]

A Chin, WJ Chen, T Chang, RH Kao… - IEEE Electron …, 1997 - ieeexplore.ieee.org
A Chin, WJ Chen, T Chang, RH Kao, BC Lin, C Tsai, JCM Huang
IEEE Electron Device Letters, 1997ieeexplore.ieee.org
We have studied the inversion layer mobility of n-MOSFET's with thin-gate oxide of 20 to
70/spl Aring/. Direct relationship of electron mobility to oxide/channel interface roughness
was obtained from measured mobility of MOSFET's and high-resolution TEM. By using a low-
pressure oxidation process with native oxide removed in situ prior to oxidation, atomically
smooth interface of oxide/channel was observed by high-resolution TEM for oxide
thicknesses of 11 and 38/spl Aring/. The roughness increased to one to two monolayers of Si …
We have studied the inversion layer mobility of n-MOSFET's with thin-gate oxide of 20 to 70 /spl Aring/. Direct relationship of electron mobility to oxide/channel interface roughness was obtained from measured mobility of MOSFET's and high-resolution TEM. By using a low-pressure oxidation process with native oxide removed in situ prior to oxidation, atomically smooth interface of oxide/channel was observed by high-resolution TEM for oxide thicknesses of 11 and 38 /spl Aring/. The roughness increased to one to two monolayers of Si in a 55-/spl Aring/ oxide. Significant mobility improvement was obtained from these oxides with smoother interface than that from conventional furnace oxidation. Mobility reduction with decreasing oxide thickness was observed in the 20- and 35-/spl Aring/ oxide, with the same atomically smooth oxide/channel interface. This may be due to the remote Coulomb scattering from gate electrode or the gate field variation from poly-gate/oxide interface roughness.
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