Towards steep slope MOSFETs using ferroelectric negative capacitance
2014 12th IEEE International Conference on Solid-State and …, 2014•ieeexplore.ieee.org
Effective negative capacitance has been postulated in ferroelectrics because there is
hysteresis in plots of polarization-electric field. In future integrated circuits, the incorporation
of negative capacitance into MOSFET gate stacks would reduce the sub-threshold slope,
enabling low power operation and reduced self-heating. As a step towards meeting this
challenge, effective negative capacitance is demonstrated at room temperature in metal-
insulator-metal capacitors, where it is stabilized by the presence of a paraelectric material.
hysteresis in plots of polarization-electric field. In future integrated circuits, the incorporation
of negative capacitance into MOSFET gate stacks would reduce the sub-threshold slope,
enabling low power operation and reduced self-heating. As a step towards meeting this
challenge, effective negative capacitance is demonstrated at room temperature in metal-
insulator-metal capacitors, where it is stabilized by the presence of a paraelectric material.
Effective negative capacitance has been postulated in ferroelectrics because there is hysteresis in plots of polarization-electric field. In future integrated circuits, the incorporation of negative capacitance into MOSFET gate stacks would reduce the sub-threshold slope, enabling low power operation and reduced self-heating. As a step towards meeting this challenge, effective negative capacitance is demonstrated at room temperature in metal-insulator-metal capacitors, where it is stabilized by the presence of a paraelectric material.
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