Using FPGA real time model for novel 33-level switched-capacitor multilevel inverter for PMSM drive

N Lakshmipriya, NP Anathamoorthy - Microprocessors and Microsystems, 2020 - Elsevier
This research work focuses to put forward a novel inverter topology of multilevel voltage
output. The presented topology is devised by means of switched-capacitor technique (SCT)
and switched-capacitor cells count is decided by output levels quantity. In the technique
introduced, SCT inverter is in a flexible configuration and has the capability to self-balance
the capacitor's voltage with no use of auxiliary circuits what so ever. The topologies
presented decrease power switches quantity, isolated dc power supplies, diodes, size and …
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