A 24-GHz 3.9-dB NF low-noise amplifier using 0.18 μm CMOS technology
A 24-GHz low-noise amplifier (LNA) was designed and fabricated in a standard 0.18-μm
CMOS technology. The LNA chip achieves a peak gain of 13.1 dB at 24 GHz and a minimum …
CMOS technology. The LNA chip achieves a peak gain of 13.1 dB at 24 GHz and a minimum …
A 7-GHz 1.8-dB NF CMOS low-noise amplifier
R Fujimoto, K Kojima, S Otaka - IEEE journal of solid-state …, 2002 - ieeexplore.ieee.org
A 7-GHz low-noise amplifier (LNA) was designed and fabricated using 0.25-/spl mu/m
CMOS technology. A cascode configuration with a dual-gate MOSFET and shielded pads …
CMOS technology. A cascode configuration with a dual-gate MOSFET and shielded pads …
A 15 GHz and a 20 GHz low noise amplifier in 90 nm RF-CMOS
L Aspemyr, H Jacobsson, M Bao… - Digest of Papers …, 2006 - ieeexplore.ieee.org
The design and measured performance of two low-noise amplifiers at 15 GHz and 20 GHz
realized in a 90 nm RF-CMOS process are presented in this work. The 15 GHz LNA …
realized in a 90 nm RF-CMOS process are presented in this work. The 15 GHz LNA …
A 75.5-to-120.5-GHz, high-gain CMOS low-noise amplifier
DR Lu, YC Hsu, JC Kao, JJ Kuo… - 2012 IEEE/MTT-S …, 2012 - ieeexplore.ieee.org
In this paper, a high-gain and wideband low-noise amplifier using 65-nm CMOS process is
proposed. A four-stage cascode configuration is adopted to achieve the high gain and …
proposed. A four-stage cascode configuration is adopted to achieve the high gain and …
K-band low-noise amplifiers using 0.18 μm CMOS technology
KW Yu, YL Lu, DC Chang, V Liang… - IEEE Microwave and …, 2004 - ieeexplore.ieee.org
Two K-Band low-noise amplifiers (LNAs) are designed and implemented in a standard 0.18
μm CMOS technology. The 24 GHz LNA has demonstrated a 12.86 dB gain and a 5.6 dB …
μm CMOS technology. The 24 GHz LNA has demonstrated a 12.86 dB gain and a 5.6 dB …
A 60 GHz broadband low-noise amplifier with variable-gain control in 65 nm CMOS
YK Hsieh, JL Kuo, H Wang… - IEEE microwave and …, 2011 - ieeexplore.ieee.org
A 60 GHz low-noise amplifier (LNA) implemented in a 65 nm CMOS process is presented.
Due to the use of a gain-boosted input stage and binary controlled attenuators, the LNA …
Due to the use of a gain-boosted input stage and binary controlled attenuators, the LNA …
13 GHz 4.67 dB NF CMOS low-noise amplifier
The design and measured results of a fully-integrated 13 GHz CMOS low-noise amplifier
(LNA) are presented. Effects of substrate resis-tances on LNA performance are discussed …
(LNA) are presented. Effects of substrate resis-tances on LNA performance are discussed …
A 60-GHz high-gain, low-power, 3.7-dB noise-figure low-noise amplifier in 90-nm CMOS
HC Kuo, HR Chuang - 2013 European Microwave Conference, 2013 - ieeexplore.ieee.org
This paper presents a 60-GHz high-gain, low-power, 3.7-dB noise-figure (NF), CMOS low-
noise amplifier (LNA) fabricated with a 90-nm process. The CMOS LNA exhibited a two …
noise amplifier (LNA) fabricated with a 90-nm process. The CMOS LNA exhibited a two …
An Ultra-Low-Power 24 GHz Low-Noise Amplifier Using 0.13 CMOS Technology
This study presents an ultra-low-power 24 GHz low-noise amplifier (LNA) using 0.13 μm
CMOS technology. We propose of using the minimum noise measure (M MIN) as the …
CMOS technology. We propose of using the minimum noise measure (M MIN) as the …
A 0.5–11 GHz CMOS low noise amplifier using dual-channel shunt technique
QT Lai, JF Mao - IEEE microwave and wireless components …, 2010 - ieeexplore.ieee.org
A 0.5-11 GHz CMOS low noise amplifier (LNA) is proposed, with a new dual-channel shunt
technique implemented, where one channel uses inductive-series peaking to provide flat …
technique implemented, where one channel uses inductive-series peaking to provide flat …