Ultra low-voltage/low-power digital floating-gate circuits

Y Berg, DT Wisland, TS Lande - IEEE Transactions on circuits …, 1999 - ieeexplore.ieee.org
This paper describes a novel technique for implementing ultra low-voltage/low-power digital
circuits. The effective threshold voltage seen from a control gate is adjusted during a UV …

Programming floating-gate circuits with UV-activated conductances

Y Berg, TS Lande, O Naess - … on Circuits and Systems II: Analog …, 2001 - ieeexplore.ieee.org
A programming technique for controlling the floating gates (FGs) in ultra-low-voltage (ULV)
floating-gate circuits is presented. Simple ULV PG current-scaling and level-shifting circuits …

A new family of low-voltage circuits based on quasi-floating gate transistors

C Urquidi, J Ramirez-Angulo… - The 2002 45th …, 2002 - ieeexplore.ieee.org
A new family of very low-voltage analog circuits is introduced. These circuits do not show the
GB degradation that characterizes other low-voltage approaches based on floating-gate …

Low-voltage circuits building blocks using multiple-input floating-gate transistors

J Ramirez-Angulo, SC Choi… - IEEE Transactions on …, 1995 - ieeexplore.ieee.org
A systematic approach for designing analog circuits with low supply voltage requirements is
discussed. This approach is based on the utilization of multiple-input floating-gate …

Area efficient circuit tuning with floating-gate techniques

Y Berg, TS Lande - 1999 IEEE International Symposium on …, 1999 - ieeexplore.ieee.org
An area efficient technique for tuning floating-gate circuits is described. The effective
threshold voltage seen from a control gate can be programmed to virtually any value. The …

A new family of very low-voltage analog circuits based on quasi-floating-gate transistors

J Ramirez-Angulo, CA Urquidi… - … on Circuits and …, 2003 - ieeexplore.ieee.org
A new family of very low-voltage analog circuits is introduced. These circuits do not show the
GB degradation that characterizes other low-voltage approaches based on floating-gate …

Real-time reconfigurable linear threshold elements implemented in floating-gate CMOS

S Aunet, Y Berg, T Sæther - IEEE Transactions on Neural …, 2003 - ieeexplore.ieee.org
This paper describes using theory, computer simulations, and laboratory measurements a
new class of real-time reconfigurable UV-programmable floating-gate (FGUVMOS) linear …

Programmable floating-gate MOS logic for low-power operation

Y Berg, ST Lande - 1997 IEEE International Symposium on …, 1997 - ieeexplore.ieee.org
In this paper we propose a novel technique for programming floating gate MOS transistors
(FGMOS) in low-power design. By threshold-shifting low-power operation is possible with …

[PDF][PDF] Low-power CMOS design through VTH control and low-swing circuits

T Sakurai, H Kawaguchi, T Kuroda - Proceedings of the 1997 …, 1997 - dl.acm.org
This paper describes some of the circuit level techniques for low-power CMOS designs. Vr,
control circuits are necessary for achieving low-threshold voltage in high-speed low-voltage …

High-speed compact circuits with CMOS

RH Krambeck, CM Lee, HFS Law - IEEE Journal of Solid-State …, 1982 - ieeexplore.ieee.org
Characteristics of various CMOS and NMOS circuit techniques are described, along with the
shortcomings of each. Then a new circuit type, the CMOS domino circuit is described. This …