A 2.14 GHz, 0.78 dB noise figure CMOS low noise amplifier
D Pienkowski, R Circa, G Boeck - The European Conference …, 2005 - ieeexplore.ieee.org
This work presents a 2 GHz LNA designed for UMTS mobile terminals. The circuit is
implemented in a 0.13 mum CMOS technology. In design methodology small signal and …
implemented in a 0.13 mum CMOS technology. In design methodology small signal and …
A dual-band CMOS low noise amplifier for wireless communication
Y Shen, CH Kuo, WC Lee, KF Tsang… - … on Wireless Mobile …, 2011 - ieeexplore.ieee.org
A dual-band 900 MHz and 2.4 GHz Low Noise Amplifier (LNA) for wireless communication is
designed. The gains achieved are both 16 dB and the resulting noise figures are about 2.5 …
designed. The gains achieved are both 16 dB and the resulting noise figures are about 2.5 …
A low voltage/low power 1.57 GHz low noise amplifier
R Salmeh - IEEE/Sarnoff Symposium on Advances in Wired …, 2005 - ieeexplore.ieee.org
This paper describes the design of a 1.57 GHz low noise amplifier. The LNA uses a modified
cascode architecture and was implemented in CMOS 90 nm technology. Powered by a 1.0 …
cascode architecture and was implemented in CMOS 90 nm technology. Powered by a 1.0 …
A CMOS low noise amplifier for 5 to 6 GHz wireless applications
V Subramanian, S Spiegel, R Eickhoff… - 2007 SBMO/IEEE MTT …, 2007 - ieeexplore.ieee.org
This work demonstrates the design of a wideband low noise amplifier in 0.13 um CMOS
technology. Important design aspects and the influence of bandwidth improving circuit …
technology. Important design aspects and the influence of bandwidth improving circuit …
A 0.8 GHz to 1 GHz 0.25 μm CMOS low noise amplifier for multi-standard receiver
A single-ended low noise amplifier (LNA) for a multi-standard (800 to 1000 MHz) mobile
receiver that covers GSM and 3G respectively, has been designed and simulated in a 0.25 …
receiver that covers GSM and 3G respectively, has been designed and simulated in a 0.25 …
CMOS LNA in wireless applications
S Yang, R Mason, C Plett - 1999 IEEE 49th Vehicular …, 1999 - ieeexplore.ieee.org
A 1.9 GHz low noise amplifier has been designed in a standard CMOS. 35 micron process.
The amplifier provides a gain of 21 dB with a noise figure only 1.4 dB while drawing 6.5 mW …
The amplifier provides a gain of 21 dB with a noise figure only 1.4 dB while drawing 6.5 mW …
2 GHz, 130 nm CMOS low noise amplifier for WCDMA
D Pienkowski, R Circa, G Boeck - SBMO/IEEE MTT-S …, 2005 - ieeexplore.ieee.org
This work presents a 2 GHz LNA designed for WCDMA mobiles. The circuit is implemented
in a 0.13/spl mu/m CMOS technology. The design methodology is presented taking into …
in a 0.13/spl mu/m CMOS technology. The design methodology is presented taking into …
[PDF][PDF] Design 2.4 GHz 130nm CMOS Low Noise Amplifier Design for Wireless Network
A Dhongde, P Indurkar, R Kadam - International Journal of Computer …, 2014 - academia.edu
ABSTRACT A low noise amplifier is one of the most commonly used components in analog
and digital circuit designs. Low voltage, low power and low noise amplifier design has …
and digital circuit designs. Low voltage, low power and low noise amplifier design has …
Design of a 6GHz high-gain low noise amplifier
X Tang, F Huang, D Zhao - 2012 international conference on …, 2012 - ieeexplore.ieee.org
This paper presents the design of a low noise amplifier in 0.13-μm CMOS technology. The
conventional inductive degeneration is applied to reduce the noise figure. The amplifying …
conventional inductive degeneration is applied to reduce the noise figure. The amplifying …
A 5 GHz low-power, high-linearity low-noise amplifier in a digital 0.35/spl mu/m CMOS process
JS Fairbanks, LE Larson - Radio and Wireless Conference …, 2003 - ieeexplore.ieee.org
A 5 GHz low noise amplifier (LNA), intended for use in a wireless local area network (WLAN)
receiver, has been implemented in a standard digital 0.35/spl mu/m CMOS process. The …
receiver, has been implemented in a standard digital 0.35/spl mu/m CMOS process. The …