A 18–33 GHz CMOS LNA with 26.7 dB peak gain and 2.8 dB minimum NF for K/Ka-band applications
Abstract In the paper, a 18–33 GHz wideband low noise amplifier (LNA) with a T-type
inductive network is proposed. The T-type inductive network generates two dominant poles …
inductive network is proposed. The T-type inductive network generates two dominant poles …
A 7.3–14.2 GHz 6.3 mW LNA with 9.4±0.6 dB gain using transformer feedback and peak-gain distribution
Y Xie, J Wen - Microelectronics Journal, 2025 - Elsevier
This article presents a wideband low-noise amplifier (LNA) with low power consumption and
flat gain, implemented in a 180 nm CMOS technology. This LNA uses low voltage operation …
flat gain, implemented in a 180 nm CMOS technology. This LNA uses low voltage operation …
A 115.7–139.7 GHz Amplifier with 19.7 dB Peak Gain and 7.9 dB NF in 40-nm CMOS
A 115.7–139.7 GHz low noise amplifier (LNA) is presented. The neutralization capacitance
is chosen to minimize the tradeoff between the achievable gain and noise figure. Based on …
is chosen to minimize the tradeoff between the achievable gain and noise figure. Based on …
A 0.5-V 0.88-mW Low Noise Amplifier With Active and Passive Gm Enhancements in Sub-6 GHz Band
This letter presents a sub-1 V low-noise amplifier (LNA) with active and passive
enhancements for low-power applications in the sub-6 GHz band. By using an enhanced …
enhancements for low-power applications in the sub-6 GHz band. By using an enhanced …
A 5.79‐dB NF, 30‐GHz‐band monolithic LNA with 10 mW power consumption in standard 0.18‐μm CMOS technology
CC Chen, YS Lin, GW Huang… - Microwave and Optical …, 2009 - Wiley Online Library
Abstract A 30‐GHz (Ka‐band) low‐noise amplifier (LNA) with 10 mW power consumption
(PDC) using standard 0.18‐μm CMOS technology was designed and implemented. To …
(PDC) using standard 0.18‐μm CMOS technology was designed and implemented. To …
A 60–90GHz stagger-tuned low-noise amplifier with 1.2 dBm OP1dB in 65nm CMOS
A Mustapha, A Shabra - 2017 24th IEEE International …, 2017 - ieeexplore.ieee.org
This paper presents a 60-90 GHz wide-bandwidth low noise amplifier (LNA) implemented in
a 65nm CMOS low power process with ft of 160GHz. The LNA which is composed of three …
a 65nm CMOS low power process with ft of 160GHz. The LNA which is composed of three …
A 74.8-88.8 GHz Wideband CMOS LNA Achieving+ 4.73 dBm OP1dB and 6.39 dB Minimum NF
L Zou, K Zhao, Z Fang, L Huang, B Liu… - 2023 IEEE/MTT-S …, 2023 - ieeexplore.ieee.org
This paper presents a 74.8-88.8 GHz low-noise amplifier (LNA) in a 55-nm CMOS
technology. The LNA employs one common-gate (CG) stage, one common-source (CS) …
technology. The LNA employs one common-gate (CG) stage, one common-source (CS) …
3.7 mW 24 GHz LNA with 10.1 dB gain and 4.5 dB NF in 0.18 µm CMOS technology
JH Lee, CC Chen, YS Lin - Electronics letters, 2010 - IET
A low-power 24 GHz low-noise amplifier (LNA) with flat and low noise figure (NF) using
standard 0.18 µm CMOS technology is demonstrated. The low-power LNA consists of three …
standard 0.18 µm CMOS technology is demonstrated. The low-power LNA consists of three …
A 60-GHz 26.3-dB gain 5.3-dB NF low-noise amplifier in 65-nm CMOS using Q-factor enhanced inductors
In this paper, a 60-GHz high gain low-noise amplifier is designed and verified
experimentally. Firstly, inductors with asymmetrical ground plane are introduced and studied …
experimentally. Firstly, inductors with asymmetrical ground plane are introduced and studied …
A 19.6–39.4 GHz Broadband Low Noise Amplifier Based on Triple-Coupled Technique and T-Coil Network in 65-nm CMOS
J Wan, X Li, F Han, Q Qi, X Liu, Z Chen - Electronics, 2022 - mdpi.com
This paper presents a differential 19.6–39.4 GHz broadband low-noise amplifier (LNA) in 65-
nm CMOS technology. The LNA consists of two cascode stage and one common-source …
nm CMOS technology. The LNA consists of two cascode stage and one common-source …