Data dependence speculation using data address prediction and its enhancement with instruction reissue

T Sato - Proceedings. 24th EUROMICRO Conference (Cat. No …, 1998 - ieeexplore.ieee.org
Introduces an instruction reissue mechanism in order to enhance dynamic data dependence
speculation using data address prediction. Since instructions which are not data-dependent …

Reslice: Selective re-execution of long-retired misspeculated instructions using forward slicing

SR Sarangi, W Liu, J Torrellas… - 38th Annual IEEE/ACM …, 2005 - ieeexplore.ieee.org
As more data value speculation mechanisms are being proposed to speed-up processors,
there is growing pressure on the critical processor structures that must buffer the state of the …

[PDF][PDF] Analyzing overhead of reissued instructions on data speculative processors

T Sato - Workshop on Performance Analysis and its Impact on …, 1998 - cis.fukuoka-u.ac.jp
In this paper, we investigate the impact of instructions reissued due to mispredicted data ow
speculation on processor performance. Recently, data dependences are studied to be …

Memory address prediction for data speculation

J González, A González - Euro-Par'97 Parallel Processing: Third …, 1997 - Springer
Data speculation refers to the execution of an instruction before some logically preceding
instructions on which it is data dependent. Data speculation implies some form of prediction …

A unified compiler framework for control and data speculation

RD Ju, K Nomura, U Mahadevan… - … Conference on Parallel …, 2000 - ieeexplore.ieee.org
Control speculation refers to the execution of instructions before it has been determined that
they would be executed in the normal flow of execution. Data speculation refers to the …

Performance potentials of compiler-directed data speculation

Y Wu, LL Chen, R Ju, J Fang - 2003 IEEE International …, 2003 - ieeexplore.ieee.org
Compiler-directed data speculation has been implemented on Itanium systems to allow for a
compiler to move a load across a store even when the two operations are potentially aliased …

Evaluating the impact of reissued instructions on data speculative processor performance

T Sato - Microprocessors and Microsystems, 2002 - Elsevier
In this paper, we investigate the impact of instructions reissued due to misspeculated data
dependences on processor performance. Recently, the practice of speculation in resolving …

The effect of speculative execution on cache performance

J Pierce, T Mudge - Proceedings of 8th International Parallel …, 1994 - ieeexplore.ieee.org
Superscalar microprocessors obtain high performance by exploiting parallelism at the
instruction level. To effectively use the instruction-level parallelism found in general purpose …

A study on the number of memory ports in multiple instruction issue machines

SM Moon, K Ebcioğlu - Proceedings of the 26th annual …, 1993 - ieeexplore.ieee.org
Compiler-controlled speculative execution has been shown to be effective in increasing the
available instruction level parallelism (ILP) found in non-numeric programs. An important …

Partial resolution in data value predictors

T Sato, I Arita - Proceedings 2000 International Conference on …, 2000 - ieeexplore.ieee.org
Recently, the practice of speculation in resolving data dependences has been studied as a
means of extracting more instruction level parallelism (ILP). An outcome of an instruction is …