Self-optimization of mpsocs targeting resource efficiency and fault tolerance

M Porrmann, M Purnaprajna… - 2009 NASA/ESA …, 2009 - ieeexplore.ieee.org
A dynamically reconfigurable on-chip multiprocessor architecture is presented, which can be
adapted to changing application demands and to faults detected at run-time. The scalable …

Runtime adaptive multi-processor system-on-chip: RAMPSoC

D Gohringer, M Hubner, V Schatz… - 2008 IEEE International …, 2008 - ieeexplore.ieee.org
Current trends in high performance computing show, that the usage of multiprocessor
systems on chip are one approach for the requirements of computing intensive applications …

Architecture of a dynamically reconfigurable NoC for adaptive reconfigurable MPSoC

B Ahmad, AT Erdogan… - First NASA/ESA …, 2006 - ieeexplore.ieee.org
This paper describes the architecture of our dynamically reconfigurable network-on-chip
(NoC) architecture that has been proposed for reconfigurable multiprocessor system-on-chip …

Morpheus: Heterogeneous reconfigurable computing

F Thoma, M Kuhnle, P Bonnot… - … conference on field …, 2007 - ieeexplore.ieee.org
Reconfigurable architectures and NoC (Network-on-Chip) communication systems have
introduced new research directions for technology and flexibility issues, which have been …

On the development of a runtime reconfigurable multicore system-on-chip

A Cazzaniga, G Durelli, C Pilato… - 2012 15th Euromicro …, 2012 - ieeexplore.ieee.org
Over the last years, several research groups have built reconfigurable systems to obtain
high performance at low cost by specializing the computing engine to the computation task …

Dynamically reconfigurable NoC for reconfigurable MPSoC

B Ahmad, T Arslan - Proceedings of the IEEE 2005 Custom …, 2005 - ieeexplore.ieee.org
The performance of a multiprocessor system-on-chip (MPSoC) is not only dependent on the
computational capabilities of on-chip processors but also depends on the communication …

Design of a HW/SW communication infrastructure for a heterogeneous reconfigurable processor

A Deledda, C Mucci, A Vitkovski, P Bonnot… - Proceedings of the …, 2008 - dl.acm.org
Reconfigurable architectures and NoC (Network-on-Chip) have introduced new research
directions for technology and flexibility issues, which have been largely investigated in the …

Mapping real-life applications on run-time reconfigurable NoC-based MPSoC on FPGA

AK Singh, A Kumar, T Srikanthan… - … Conference on Field …, 2010 - ieeexplore.ieee.org
Multiprocessor systems-on-chip (MPSoC) are required to fulfill the performance demand of
modern real-life embedded applications. These MPSoCs are employing Network-on-Chip …

A design methodology for application partitioning and architecture development of reconfigurable multiprocessor systems-on-chip

D Göhringer, M Hübner, M Benz… - 2010 18th IEEE Annual …, 2010 - ieeexplore.ieee.org
Until today, the efficient partitioning and mapping of applications for multiprocessor systems
is a challenging task. The deployment of reconfigurable hardware in this domain helps to …

Windows CE for a reconfigurable system-on-a-chip processor

MR George, WF Wong - Proceedings. 2004 IEEE International …, 2004 - ieeexplore.ieee.org
Reconfigurable system-on-a-chip (RSoC) processors promise a low cost and rapid means of
prototyping complex systems of integrated software and hardware, especially for embedded …