Semiconductor integrated circuit device
K Ishibashi, S Shukuri, K Yanagisawa… - US Patent …, 2006 - Google Patents
To reduce cost of defect redundancy and trimming in a semiconductor integrated circuit
having multiple layer wir ings and copper wirings, an address for salvaging a defect of a …
having multiple layer wir ings and copper wirings, an address for salvaging a defect of a …
Semiconductor integrated circuit device
K Ishibashi, S Shukuri, K Yanagisawa… - US Patent …, 2006 - freepatentsonline.com
To reduce cost of defect redundancy and trimming in a semiconductor integrated circuit
having multiple layer wirings and copper wirings, an address for salvaging a defect of a …
having multiple layer wirings and copper wirings, an address for salvaging a defect of a …
Semiconductor integrated circuit device
K Ishibashi, S Shukuri, K Yanagisawa… - US Patent App. 11 …, 2005 - Google Patents
To reduce cost of defect redundancy and trimming in a semiconductor integrated circuit
having multiple layer wirings and copper wirings, an address for salvaging a defect of a …
having multiple layer wirings and copper wirings, an address for salvaging a defect of a …
Semiconductor integrated circuit device
K Ishibashi, S Shukuri, K Yanagisawa… - US Patent App. 11 …, 2005 - freepatentsonline.com
To reduce cost of defect redundancy and trimming in a semiconductor integrated circuit
having multiple layer wirings and copper wirings, an address for salvaging a defect of a …
having multiple layer wirings and copper wirings, an address for salvaging a defect of a …