Towards a Vertical and Damage Free Post-Etch InGaAs Fin Profile: Dry Etch Processing, Sidewall Damage Assessment and Mitigation Options
U Peralagu, X Li, O Ignatova, YC Fu, DAJ Millar… - ECS …, 2015 - iopscience.iop.org
Based on current projections, III-Vs are expected to replace Si as the n-channel solution in
FinFETs at the 7nm technology node. The realisation of III-V FinFETs entails top-down …
FinFETs at the 7nm technology node. The realisation of III-V FinFETs entails top-down …
[引用][C] Towards a Vertical and Damage Free Post-Etch InGaAs Fin Profile: Dry Etch Processing, Sidewall Damage Assessment and Mitigation Options
U Peralagu, X Li, O Ignatova, YC Fu… - ECS …, 2015 - ui.adsabs.harvard.edu
(Invited) Towards a Vertical and Damage Free Post-Etch InGaAs Fin Profile: Dry Etch
Processing, Sidewall Damage Assessment and Mitigation Options - NASA/ADS Now on home …
Processing, Sidewall Damage Assessment and Mitigation Options - NASA/ADS Now on home …
[PDF][PDF] Towards a Vertical and Damage Free Post-Etch InGaAs Fin Profile: Dry Etch Processing, Sidewall Damage Assessment and Mitigation Options
U Peralagua, X Lia, O Ignatovaa, YC Fua, DAJ Millara… - researchgate.net
Based on current projections, III-Vs are expected to replace Si as the n-channel solution in
FinFETs at the 7nm technology node. The realisation of III-V FinFETs entails top-down …
FinFETs at the 7nm technology node. The realisation of III-V FinFETs entails top-down …
towards a vertical and damage free post-etch InGaAs fin profile: dry etch processing, sidewall damage assessment and mitigation options
U Peralagu, X Li, O Ignatova, YC Fu, DAJ Millar… - ECS …, 2015 - eprints.gla.ac.uk
Based on current projections, III-Vs are expected to replace Si as the n-channel solution in
FinFETs at the 7nm technology node. The realisation of III-V FinFETs entails top-down …
FinFETs at the 7nm technology node. The realisation of III-V FinFETs entails top-down …
[PDF][PDF] http://eprints. gla. ac. uk/111329
U Peralagu - core.ac.uk
Based on current projections, III-Vs are expected to replace Si as the n-channel solution in
FinFETs at the 7nm technology node. The realisation of III-V FinFETs entails top-down …
FinFETs at the 7nm technology node. The realisation of III-V FinFETs entails top-down …
Towards a Vertical and Damage Free Post-Etch InGaAs Fin Profile: Dry Etch Processing, Sidewall Damage Assessment and Mitigation Options
U Peralagu, X Li, O Ignatova, YC Fu… - Electrochemical …, 2015 - iopscience.iop.org
In an era of power-constrained transistor scaling, III-V semiconductors, with high electron
velocities, appear promising as the n-channel solution in post-Si CMOS technologies [1]. To …
velocities, appear promising as the n-channel solution in post-Si CMOS technologies [1]. To …
[PDF][PDF] http://eprints. gla. ac. uk/111329
U Peralagu - academia.edu
Based on current projections, III-Vs are expected to replace Si as the n-channel solution in
FinFETs at the 7nm technology node. The realisation of III-V FinFETs entails top-down …
FinFETs at the 7nm technology node. The realisation of III-V FinFETs entails top-down …
[PDF][PDF] http://eprints. gla. ac. uk/111329
U Peralagu - scholar.archive.org
Based on current projections, III-Vs are expected to replace Si as the n-channel solution in
FinFETs at the 7nm technology node. The realisation of III-V FinFETs entails top-down …
FinFETs at the 7nm technology node. The realisation of III-V FinFETs entails top-down …