Narrow sub-fin technique for suppressing parasitic-channel effect in stacked nanosheet transistors

J Gu, Q Zhang, Z Wu, Y Luo, L Cao… - IEEE Journal of the …, 2021 - ieeexplore.ieee.org
A new approach of narrowing sub-fin with little extra process cost for suppressing parasitic-
channel-effect (PCE) on vertically-stacked horizontal gate-all-around (GAA) Si nanosheet …
被引用次数：19 相关文章
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[PDF][PDF] Narrow Sub-Fin Technique for Suppressing Parasitic-Channel Effect in Stacked Nanosheet Transistors

Y CAI, J YAO, Z ZHANG, G XU, W WANG - scholar.archive.org
ABSTRACT A new approach of narrowing sub-fin with little extra process cost for
suppressing parasitic-channel-effect (PCE) on vertically-stacked horizontal gate-all-around …