A critical review on performance, reliability, and fabrication challenges in nanosheet FET for future analog/digital IC applications

S Valasa, S Tayal, LR Thoutam, J Ajayan… - Micro and …, 2022 - Elsevier
This article critically reviews the fabrication challenges, emerging materials (wafer, high-k
oxide, gate metal, channel materials), dimensional influences, thermal effects, growth …

Gate stack analysis of nanosheet FET for analog and digital circuit applications

NA Kumari, V Vijayvargiya, AK Upadhyay… - ECS Journal of Solid …, 2023 - iopscience.iop.org
This manuscript demonstrates the performance comparison of vertically stacked nanosheet
FET with various high-k materials in gate stack (GS) configuration. As the high-k dielectric …

Geometrical variability impact on the performance of sub-3 nm gate-all-around stacked nanosheet FET

N Yadav, S Jadav, G Saini - Silicon, 2022 - Springer
To meet the scaling targets and continue with Moore's Law, the transition from FinFET to
Gate-All-Around (GAA) nanosheet Field Effect Transistors (FETs) is the necessity for low …

Investigation of Analog/RF and linearity performance with self-heating effect in nanosheet FET

S Rathore, RK Jaisawal, PN Kondekar, N Bagga - Microelectronics Journal, 2023 - Elsevier
In vertically stacked gate-all-around Nanosheet FET (NSFET), the channels/sheets are
wrapped by a low thermal conductivity material, which hinders the active heat flow path and …

A comprehensive analysis of nanosheet FET and its CMOS circuit applications at elevated temperatures

NA Kumari, P Prithvi - Silicon, 2023 - Springer
Abstract The Nanosheet Field Effect Transistor (NSFET) has been shown to be a viable
candidate for sub-7-nm technology nodes. This paper assesses and compares the NSFET …

Design insights of nanosheet FET and CMOS circuit applications at 5-nm technology node

VB Sreenivasulu, V Narendar - IEEE Transactions on Electron …, 2022 - ieeexplore.ieee.org
In this article, FinFET, vertically stacked gate-all-around (GAA) nanowire (NW), and
nanosheet (NS) FETs performance are estimated with equal effective channel widths () at …

Nanosheet field effect transistors-A next generation device to keep Moore's law alive: An intensive study

J Ajayan, D Nirmal, S Tayal, S Bhattacharya… - Microelectronics …, 2021 - Elsevier
Incessant downscaling of feature size of multi-gate devices such as FinFETs and gate-all-
around (GAA) nanowire (NW)-FETs leads to unadorned effects like short channel effects …

Spacer engineering on nanosheet FETs towards device and circuit perspective

NA Kumari, VB Sreenivasulu, J Ajayan… - ECS Journal of Solid …, 2023 - iopscience.iop.org
Abstract The Nanosheet FET (NS FET) has proven to be a potential candidate for sub-5-nm
nodes. For the first time, in this manuscript, the NS FET performance is demonstrated by …

Self-heating aware threshold voltage modulation conforming to process and ambient temperature variation for reliable nanosheet FET

S Rathore, RK Jaisawal, PN Kondekar… - 2023 IEEE …, 2023 - ieeexplore.ieee.org
Internal and external process variations severely affect the device threshold voltage (V_th)
and, in turn, the device's reliability. For the first time, this paper presented a thorough …

Impact of scaling on nanosheet FET and CMOS circuit applications

NA Kumari, VB Sreenivasulu… - ECS Journal of Solid State …, 2023 - iopscience.iop.org
In this paper, the impact of scaling on the gate all around the nanosheet field effect transistor
(GAA NSFET) is assessed in detail at sub-5-nm nodes for digital and analog/RF …