Cluster interlayer safety mechanism in an artificial neural network processor
G Kaminitz, O Katz, O Danon, D Chibotero… - US Patent …, 2024 - Google Patents
Novel and useful system and methods of functional safety mechanisms for use in an artificial
neural network (ANN) processor. The mechanisms can be deployed individually or in …
neural network (ANN) processor. The mechanisms can be deployed individually or in …
Weights safety mechanism in an artificial neural network processor
G Kaminitz, R Seznayov, D Chibotero, O Katz… - US Patent …, 2023 - Google Patents
Novel and useful system and methods of several functional safety mechanisms for use in an
artificial neural network (ANN) processor. The mechanisms can be deployed individually or …
artificial neural network (ANN) processor. The mechanisms can be deployed individually or …
Configurable and programmable sliding window based memory access in a neural network processor
A Baum, O Danon, H Zeitlin, D Ciubotariu… - US Patent …, 2022 - Google Patents
A novel and useful neural network (NN) processing core adapted to implement artificial
neural networks (ANNs) and incorporating configurable and programmable sliding window …
neural networks (ANNs) and incorporating configurable and programmable sliding window …
Neural network processor incorporating separate control and data fabric
A Baum, O Danon, H Zeitlin, D Ciubotariu… - US Patent …, 2022 - Google Patents
(57) ABSTRACT A novel and useful neural network (NN) processing core adapted to
implement artificial neural networks (ANNs) and incorporating strictly separate control and …
implement artificial neural networks (ANNs) and incorporating strictly separate control and …
Neural network processor incorporating multi-level hierarchical aggregated computing and memory elements
A Baum, O Danon, H Zeitlin, D Ciubotariu… - US Patent …, 2022 - Google Patents
(57) ABSTRACT A novel and useful neural network (NN) processing core adapted to
implement artificial neural networks (ANNs). The NN processor is constructed from self …
implement artificial neural networks (ANNs). The NN processor is constructed from self …
System and method of early termination of layer processing in an artificial neural network
A Baum, O Danon, D Chibotero - US Patent App. 17/456,373, 2023 - Google Patents
G06F9/3895—Concurrent instruction execution, eg pipeline, look ahead using a plurality of
independent parallel functional units controlled in tandem, eg multiplier-accumulator for …
independent parallel functional units controlled in tandem, eg multiplier-accumulator for …
Error detection at layers of a neural network
S Srikanth, S Seyedzadehdelcheh - US Patent App. 17/511,777, 2023 - Google Patents
US20230128916A1 - Error detection at layers of a neural network - Google Patents
US20230128916A1 - Error detection at layers of a neural network - Google Patents Error …
US20230128916A1 - Error detection at layers of a neural network - Google Patents Error …
Neural network processing element incorporating compute and local memory elements
A Baum, O Danon, H Zeitlin, D Ciubotariu… - US Patent …, 2022 - Google Patents
(57) ABSTRACT A novel and useful neural network (NN) processing core adapted to
implement artificial neural networks (ANNs) and incorporating processing circuits having …
implement artificial neural networks (ANNs) and incorporating processing circuits having …
Software Defined Redundant Allocation Safety Mechanism In An Artificial Neural Network Processor
A Baum, D Chibotero, R Seznayov… - US Patent App. 17 …, 2022 - Google Patents
2020-09-29 Assigned to Hailo Technologies Ltd. reassignment Hailo Technologies Ltd.
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors …
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors …
Compiler for implementing memory shutdown for neural network implementation configuration
B Thomas, SL Teig - US Patent 11,615,322, 2023 - Google Patents
US11615322B1 - Compiler for implementing memory shutdown for neural network
implementation configuration - Google Patents US11615322B1 - Compiler for implementing …
implementation configuration - Google Patents US11615322B1 - Compiler for implementing …