Graph processing frameworks suffer performance degradation from under-utilization of
available memory bandwidth, because graph traversal often exhibits poor locality. A prior …

Despite the high off-chip bandwidth and on-chip parallelism offered by today's near-memory
accelerators, software-based (CPU and GPU) graph processing frameworks still suffer …

Recent advances in graph processing on FPGAs promise to alleviate performance
bottlenecks with irregular memory access patterns. Such bottlenecks challenge performance …

Recent advances in reprogrammable hardware (eg, FPGAs) and memory technology (eg,
DDR4, HBM) promise to solve performance problems inherent to graph processing like …

The use of FPGAs for efficient graph processing has attracted significant interest. Recent
memory subsystem upgrades including the introduction of HBM in FPGAs promise to further …

Recent advances in graph processing on FPGAs promise to alleviate performance
bottlenecks with irregular memory access patterns. Such bottlenecks challenge performance …

This paper presents, HitGraph, an FPGA framework to accelerate graph processing based
on the edge-centric paradigm. HitGraph takes in an edge-centric graph algorithm and …

FPGA has been an emerging computing infrastructure in datacenters benefiting from fine-
grained parallelism, energy efficiency, and reconfigurability. Meanwhile, graph processing …

Existing FPGA-based graph accelerators, typically designed for static graphs, rarely handle
dynamic graphs that often involve substantial graph updates (eg, edge/node insertion and …

Graph analytics, which explores the relationships among interconnected entities, is
becoming increasingly important due to its broad applicability, from machine learning to …