Recent advances in CMOS technologies and beyond CMOS technologies have enabled the
researchers to design the circuits for High Performance Applications. This research paper is …

While power reduction during testing is necessary for today's low-power devices, it also
lowers test costs. Scan-based methods are the most widely used approach for testing …

Efficient design and optimization of flip-flops can significantly affect overall circuit
performance as they have many applications in digital systems which can impact the overall …

Data-retention flip-flops (DR-FF) provide an efficient state retention capability for any
processor with frequent active-to-sleep mode transitions. This brief proposes new ultra-low …

Cryptographic circuits generally are used for applications of wireless sensor networks to
ensure security and must be tested in a manufacturing process to guarantee their quality …

Abstract Interconnected cells, Configurable Logic Blocks (CLBs), and input/output (I/O) pads
are all present in every Field Programmable Gate Array (FPGA) structure. The interconnects …

Testing of manufactured Integrated Circuit (IC) is performed using design for testability (DFT)
techniques such as scan chain which is most popular in sequential circuits. The scan cell …

The efficiency of Latch design and optimization plays a crucial role in shaping the overall
performance of digital circuits, impacting power consumption and timing within emerging …