Multi-core devices for safety-critical systems: A survey
Multi-core devices are envisioned to support the development of next-generation safety-
critical systems, enabling the on-chip integration of functions of different criticality. This …
critical systems, enabling the on-chip integration of functions of different criticality. This …
Hybrid application mapping for composable many-core systems: Overview and future perspective
Many-core platforms are rapidly expanding in various embedded areas as they provide the
scalable computational power required to meet the ever-growing performance demands of …
scalable computational power required to meet the ever-growing performance demands of …
{CacheQL}: Quantifying and Localizing Cache {Side-Channel} Vulnerabilities in Production Software
Cache side-channel attacks extract secrets by examining how victim software accesses
cache. To date, practical attacks on crypto systems and media libraries are demonstrated …
cache. To date, practical attacks on crypto systems and media libraries are demonstrated …
Abstract interpretation under speculative execution
M Wu, C Wang - Proceedings of the 40th ACM SIGPLAN Conference on …, 2019 - dl.acm.org
Analyzing the behavior of a program running on a processor that supports speculative
execution is crucial for applications such as execution time estimation and side channel …
execution is crucial for applications such as execution time estimation and side channel …
Adversarial symbolic execution for detecting concurrency-related cache timing leaks
S Guo, M Wu, C Wang - Proceedings of the 2018 26th ACM Joint …, 2018 - dl.acm.org
The timing characteristics of cache, a high-speed storage between the fast CPU and the
slow memory, may reveal sensitive information of a program, thus allowing an adversary to …
slow memory, may reveal sensitive information of a program, thus allowing an adversary to …
Speculative execution and timing predictability in an open source RISC-V core
We present MINOTAuR, a timing predictable open source RISC-V core based on the Ariane
core [28]. We first modify Ariane in order to make it timing predictable following the approach …
core [28]. We first modify Ariane in order to make it timing predictable following the approach …
Contention cognizant scheduling of task graphs on shared bus-based heterogeneous platforms
Demands for high performance as well as reliability within stringent resource budgets are
driving a shift from homogeneous to heterogeneous processing platforms for the …
driving a shift from homogeneous to heterogeneous processing platforms for the …
Schedulability analysis of dynamic priority real-time systems with contention
In multicore scheduling of hard real-time systems, there is a significant source of
unpredictability due to the interference caused by the sharing of hardware resources. This …
unpredictability due to the interference caused by the sharing of hardware resources. This …
Hard real-time application mapping reconfiguration for NoC-based many-core systems
Real-time applications are increasingly targeting many-core platforms, demanding
predictability in a highly dynamic environment. To enable this shift, for each application, a …
predictability in a highly dynamic environment. To enable this shift, for each application, a …
Latency control in service chaining using P4-based data plane programmability
Abstract Service chaining is becoming one of the most considered service deployment
frameworks in the context of Network Function Virtualization (NFV) in edge and data center …
frameworks in the context of Network Function Virtualization (NFV) in edge and data center …