A unified approach for fault tolerance and dynamic power management in fixed-priority real-time embedded systems

Y Zhang, K Chakrabarty - IEEE Transactions on Computer …, 2005 - ieeexplore.ieee.org
This paper investigates an integrated approach for achieving fault tolerance and energy
savings in real-time embedded systems. Fault tolerance is achieved via checkpointing, and …

Reliability-aware co-synthesis for embedded systems

Y Xie, L Li, M Kandemir, N Vijaykrishnan… - The Journal of VLSI …, 2007 - Springer
As technology scales, transient faults have emerged as a key challenge for reliable
embedded system design. This paper proposes a design methodology that incorporates …

Optimizing kd-trees for scalable visual descriptor indexing

Y Jia, J Wang, G Zeng, H Zha… - 2010 IEEE Computer …, 2010 - ieeexplore.ieee.org
In this paper, we attempt to scale up the kd-tree indexing methods for large-scale vision
applications, eg, indexing a large number of SIFT features and other types of visual …

[PDF][PDF] List of references on evolutionary multiobjective optimization

CAC Coello - URL< http://www. lania. mx/~ ccoello/EMOO …, 2010 - delta.cs.cinvestav.mx
List of References on Evolutionary Multiobjective Optimization Page 1 List of References on
Evolutionary Multiobjective Optimization Carlos A. Coello Coello ccoello@cs.cinvestav.mx …

Task graph extraction for embedded system synthesis

KS Vallerio, NK Jha - 16th International Conference on VLSI …, 2003 - ieeexplore.ieee.org
Consumer demand and improvements in hardware have caused distributed real-time
embedded systems to rapidly increase in complexity. As a result, designers faced with time …

Reliable multiprocessor system-on-chip synthesis

C Zhu, Z Gu, RP Dick, L Shang - Proceedings of the 5th IEEE/ACM …, 2007 - dl.acm.org
This article presents a multiprocessor system-on-chip synthesis (MPSoC) algorithm that
optimizes system mean time to failure. Given a set of directed acyclic periodic graphs of …

A systematic design space exploration of MPSoC based on synchronous data flow specification

C Lee, S Kim, S Ha - Journal of Signal Processing Systems, 2010 - Springer
The design space exploration (DSE) problem addressed in this paper is to find out Multi-
Processor System-on-Chip architectures for a given multi-task signal processing application …

Application-specific MPSoC reliability optimization

Z Gu, C Zhu, L Shang, RP Dick - IEEE transactions on very …, 2008 - ieeexplore.ieee.org
This paper presents modeling and estimation techniques permitting the temperature-aware
optimization of application-specific multiprocessor system-on-chip (MPSoC) reliability …

Scan-chain design and optimization for three-dimensional integrated circuits

X Wu, P Falkenstern, K Chakrabarty, Y Xie - ACM Journal on Emerging …, 2009 - dl.acm.org
Scan chains are widely used to improve the testability of integrated circuit (IC) designs and
to facilitate fault diagnosis. For traditional 2D IC design, a number of design techniques have …

Slopes: hardware–software cosynthesis of low-power real-time distributed embedded systems with dynamically reconfigurable fpgas

L Shang, RP Dick, NK Jha - IEEE Transactions on Computer …, 2007 - ieeexplore.ieee.org
In this paper, we present a multiobjective hardware-software cosynthesis system, called
SLOPES, for multirate low-power real-time distributed embedded systems consisting of …