The memory controller is in charge of managing DRAM maintenance operations (eg,
refresh, RowHammer protection, memory scrubbing) in current DRAM chips. Implementing …

Computers continue to diversify with respect to system designs, emerging memory
technologies, and application memory demands. Unfortunately, continually adapting the …

Computing is bottlenecked by data. Large amounts of application data overwhelm storage
capability, communication capability, and computation capability of the modern machines …

This paper provides a comprehensive overview of the security vulnerability known as
rowhammer in Dynamic Random-Access Memory (DRAM). While DRAM offers many …

NAND flash memory is ubiquitous in everyday life today because its capacity has
continuously increased and cost has continuously decreased over decades. This positive …

Row hammer is a vulnerability in Dynamic Random Access Memory (DRAM) chips, whereby
repeatedly accessing a specific row in the DRAM chip may cause bit flips in memory cells …

Physically unclonable functions (PUFs) are potential security blocks to generate unique and
more secure keys in low-cost cryptographic applications. Dynamic random-access memory …

Performance improvements from DRAM technology scaling have been lagging behind the
improvements from logic technology scaling for many years. As application demand for main …

DRAM latency has remained almost constant over decades and has become a performance
bottleneck of computing systems. In this study, we propose a low-cost DRAM architecture …

Today's systems are overwhelmingly designed to move data to computation. This design
choice goes directly against at least three key trends in systems that cause performance …