A high-throughput trellis-based layered decoding architecture for non-binary LDPC codes using max-log-QSPA

YL Ueng, KH Liao, HC Chou… - IEEE Transactions on …, 2013 - ieeexplore.ieee.org
This paper presents a high-throughput decoder architecture for non-binary low-density parity-
check (LDPC) codes, where the q-ary sum-product algorithm (QSPA) in the log domain is …

A survey on decoding schedules of LDPC convolutional codes and associated hardware architectures

HB Thameur, B Le Gal, N Khouja… - 2017 IEEE Symposium …, 2017 - ieeexplore.ieee.org
Low-density parity-check convolutional codes (LDPC-CC) have interesting error correction
features. They have a great potential to become a key error-correcting codes for enhancing …

A new class of multiple-rate codes based on block Markov superposition transmission

C Liang, J Hu, X Ma, B Bai - IEEE Transactions on Signal …, 2015 - ieeexplore.ieee.org
The Hadamard transform (HT) over the binary field provides a natural way to implement
multiple-rate codes (referred to as HT-coset codes), where the code length N= 2 p is fixed …

Power characterization of a gbit/s fpga convolutional ldpc decoder

SYJ Li, TL Brandon, DG Elliott… - 2012 IEEE Workshop on …, 2012 - ieeexplore.ieee.org
In this paper, we present an FPGA implementation of parallel-node low-density-parity-check
convolution-code encoder and decoder. A 2.4 Gbit/s rate-1/2 (3, 6) LDPC convolutional …

Energy‐efficient multi‐standard early stopping criterion for low‐density‐parity‐check iterative decoding

C Condo, A Baghdadi, G Masera - IET Communications, 2014 - Wiley Online Library
Low‐density‐parity‐check codes decoding relies on powerful iterative algorithms, whose
implementation is often expensive in terms of complexity and power consumption. Several …

A rate-compatible low-density parity-check convolutional coding scheme using informed dynamic scheduling

HC Lee, YH Su, YL Ueng - 2017 IEEE 85th Vehicular …, 2017 - ieeexplore.ieee.org
Low-density parity-check convolutional codes (LDPC-CCs) are generally decoded using
sliding-window based message passing decoding. Based on the sliding-window decoding …

Hardware complexity reduction of LDPC-CC decoders based on message-passing approaches

HB Thameur, C Bouzouita, N Khouja… - … on Sciences and …, 2016 - ieeexplore.ieee.org
LDPC convolutional codes (LDPC-CC) are a family of error-correcting codes (ECC) used in
digital communication systems like the IEEE 1901 standard. High throughput and low …

Hardware-friendly probabilistic Min-Sum algorithm for fully-parallel LDPC decoders

HC Lee, CC Cheng, YL Ueng - 2014 8th International …, 2014 - ieeexplore.ieee.org
In order to simplify the check node operation of the low-density parity-check (LDPC)
decoders, this paper presents a Normalized Probabilistic Min-Sum Algorithm (NPMSA) …

應用於無線個人區域網路之多組態TB-LDPC-CC 解碼器晶片設計與實作

藍祐誠, 張錫嘉 - 2012 - ir.lib.nycu.edu.tw
在無線通訊系統中, 通道編碼模組往往扮演著重要的角色, 不僅要達到高吞吐量的傳輸需求,
也必須降低伴隨而來的功率消耗, 以提供具有技術競爭力的解決方案. 由於優越的錯誤更正能力 …

A novel decoding algorithm based on the hierarchical reliable strategy for SCG-LDPC codes in optical communications

J Yuan, Q Tong, S Huang, Y Wang - Optoelectronics Letters, 2013 - Springer
An effective hierarchical reliable belief propagation (HRBP) decoding algorithm is proposed
according to the structural characteristics of systematically constructed Gallager low-density …