Millimeter-wave circuits and systems are fundamental building blocks in scientific
instruments for space and Earth exploration. One important class of such instruments is …

This thesis discusses the design of the receiver front-end for software defined radio (SDR)
based cognitive radio applications. Two aspects of SDRs for cognitive radios are …

This paper presents an integer Phase-Locked Loop chip for 802.15. 3c sliding-IF
transceiver. The PLL is composed of a voltage-controlled oscillator, a current-mode logic …

A frequency synthesis device, including: a first generator configured to generate a periodical
signal with a frequency f 1; a second generator, coupled to the first generator and generating …

This paper presented a V-band phase-locked loop implemented in 90-nm standard CMOS
process. The capacitor bank switching techniques is adopted to increase the VCO tuning …

A low noise phase locked loop (PLL) frequency synthesizer implemented in 65 nm CMOS
technology is introduced. A VCO noise reduction method suited for short channel design is …

The paper addresses the design and realization of a high-frequency and wide range
frequency synthesizer based on a PLL together with a varactorless LC-type VCO and a push …

This work presents the design of building blocks that may be used in a microwave frequency
translation front-end including LO signal generation. The first part of this work is dedicated to …

Design and validation of millimeter-wave (MMW) devices is a significant challenge due to
the design difficulties in meeting GHz performance constraints and the cost and complexity …

A fully integrated dual loop PLL with ultra-low phase noise and fast lock time is presented.
The topology combines a frequency acquisition and a phase-locked hold loop. The phase …