Automating analogue AI chip design with genetic search

O Krestinskaya, KN Salama… - Advanced Intelligent …, 2020 - Wiley Online Library
Optimization of analogue neural circuit designs is one of the most challenging, complicated,
time‐consuming, and expensive tasks. Design automation of analogue neuromemristive …

Scalable in-memory mapping of Boolean functions in memristive crossbar array using simulated annealing

PL Thangkhiew, K Datta - Journal of Systems Architecture, 2018 - Elsevier
Memristor is a two-terminal device that can be used to store data and/or implement logic
functions in crossbar array. Memristor supports in-memory computing where storage and …

Compensated readout for high-density MOS-gated memristor crossbar array

MA Zidan, H Omran, A Sultan… - IEEE Transactions …, 2014 - ieeexplore.ieee.org
Leakage current is one of the main challenges facing high-density MOS-gated memristor
arrays. In this study, we show that leakage current ruins the memory readout process for …

Practical determination of individual element resistive states in selectorless RRAM arrays

A Serb, W Redman-White… - … on Circuits and …, 2015 - ieeexplore.ieee.org
Three distinct methods of reading multi-level cross-point resistive states from selector-less
RRAM arrays are implemented in a physical system and compared for read-out accuracy …

High-Performance Top-Gated and Double-Gated Oxide–Semiconductor Ferroelectric Field-Effect Transistor Enabled by Channel Defect Self-Compensation Effect

CK Chen, S Hooda, Z Fang, M Lal, Z Xu… - … on Electron Devices, 2023 - ieeexplore.ieee.org
In this article, we demonstrate a low-thermal budget defect-engineered process to achieve
top-gated (TG) oxide–semiconductor ferroelectric field-effect transistors (FeFETs). The …

An efficient memristor crossbar architecture for mapping Boolean functions using Binary Decision Diagrams (BDD)

PL Thangkhiew, A Zulehner, R Wille, K Datta… - Integration, 2020 - Elsevier
The memristor is considered as the fourth fundamental circuit element along with resistor,
capacitor and inductor. It is a two-terminal passive circuit element whose resistance value …

Detection and coding schemes for sneak-path interference in resistive memory arrays

Y Ben-Hur, Y Cassuto - IEEE Transactions on Communications, 2019 - ieeexplore.ieee.org
Resistive memory is a promising technology for achieving unprecedented storage densities
and new in-memory computing features. However, to fulfill their promise, resistive memories …

[HTML][HTML] Sensing circuit design techniques for RRAM in advanced CMOS technology nodes

D Zhang, B Peng, Y Zhao, Z Han, Q Hu, X Liu, Y Han… - Micromachines, 2021 - mdpi.com
Resistive random access memory (RRAM) is one of the most promising new nonvolatile
memories because of its excellent properties. Moreover, due to fast read speed and low …

Efficient training method for memristor-based array using 1T1M synapse

R Feng, J Li, S Xie, X Mao - … on Circuits and Systems II: Express …, 2023 - ieeexplore.ieee.org
In this brief, an efficient training method for memristor-based array (crossbar) with one
transistor and one memristor (1T1M) synapse is proposed, which enables parallel update of …

[HTML][HTML] Higher order neural processing with input-adaptive dynamic weights on MoS2 memtransistor crossbars

L Rahimifard, A Shylendra, S Nasrin, SE Liu… - Frontiers in Electronic …, 2022 - frontiersin.org
The increasing complexity of deep learning systems has pushed conventional computing
technologies to their limits. While the memristor is one of the prevailing technologies for …