The gate injection-based field-effect synapse transistor with linear conductance update for online training
Neuromorphic computing, an alternative for von Neumann architecture, requires synapse
devices where the data can be stored and computed in the same place. The three-terminal …
devices where the data can be stored and computed in the same place. The three-terminal …
Energy-efficient Mott activation neuron for full-hardware implementation of neural networks
To circumvent the von Neumann bottleneck, substantial progress has been made towards in-
memory computing with synaptic devices. However, compact nanodevices implementing …
memory computing with synaptic devices. However, compact nanodevices implementing …
DNN+ NeuroSim V2. 0: An end-to-end benchmarking framework for compute-in-memory accelerators for on-chip training
DNN+ NeuroSim is an integrated framework to benchmark compute-in-memory (CIM)
accelerators for deep neural networks, with hierarchical design options from device-level, to …
accelerators for deep neural networks, with hierarchical design options from device-level, to …
MoS2 Synapses with Ultra-low Variability and Their Implementation in Boolean Logic
Brain-inspired computing enabled by memristors has gained prominence over the years due
to the nanoscale footprint and reduced complexity for implementing synapses and neurons …
to the nanoscale footprint and reduced complexity for implementing synapses and neurons …
Self-selective multi-terminal memtransistor crossbar array for in-memory computing
Two-terminal resistive switching devices are commonly plagued with longstanding scientific
issues including interdevice variability and sneak current that lead to computational errors …
issues including interdevice variability and sneak current that lead to computational errors …
In-memory learning with analog resistive switching memory: A review and perspective
In this article, we review the existing analog resistive switching memory (RSM) devices and
their hardware technologies for in-memory learning, as well as their challenges and …
their hardware technologies for in-memory learning, as well as their challenges and …
Photoferroelectric all-van-der-Waals heterostructure for multimode neuromorphic ferroelectric transistors
Interface-driven effects in ferroelectric van der Waals (vdW) heterostructures provide fresh
opportunities in the search for alternative device architectures toward overcoming the von …
opportunities in the search for alternative device architectures toward overcoming the von …
Sparse reram engine: Joint exploration of activation and weight sparsity in compressed neural networks
Exploiting model sparsity to reduce ineffectual computation is a commonly used approach to
achieve energy efficiency for DNN inference accelerators. However, due to the tightly …
achieve energy efficiency for DNN inference accelerators. However, due to the tightly …
Artificial Synapse Based on a 2D-SnO2 Memtransistor with Dynamically Tunable Analog Switching for Neuromorphic Computing
A new type of two-dimensional (2D) SnO2 semiconductor-based gate-tunable memristor,
that is, a memtransistor, an integrated device of a memristor and a transistor, was …
that is, a memtransistor, an integrated device of a memristor and a transistor, was …
Reconfigurable 2D WSe2‐Based Memtransistor for Mimicking Homosynaptic and Heterosynaptic Plasticity
G Ding, B Yang, RS Chen, WA Mo, K Zhou, Y Liu… - Small, 2021 - Wiley Online Library
The mimicking of both homosynaptic and heterosynaptic plasticity using a high‐performance
synaptic device is important for developing human‐brain–like neuromorphic computing …
synaptic device is important for developing human‐brain–like neuromorphic computing …