This work presents a method to selectively extract portions of a behavioral description to be
synthesized as a hardware accelerator using High-Level Synthesis (HLS) onto different …

Low-voltage computing effectively saves energy in circuit operations, but it suffers from an
increasing propagation delay. Approximate computing can significantly reduce the …

The adoption of High-Level Synthesis (HLS) targeting Field-Programmable Gate Arrays
(FPGAs) has increased as the latest HLS tools have evolved to provide high-quality re sults …

High-level synthesis (HLS) takes as input a behavioral description (eg C/C++) and
generates efficient hardware through three main steps: allocation, scheduling, and binding …

This paper proposes a technique that increases the lifetime of consumer electronics devices.
As semiconductor technology improves in miniaturizing transistors, aging effect due to Bias …

This paper proposes a technique that increases the lifetime of large scale integration (LSI)
devices. As semiconductor technology improves at miniaturizing transistors, aging effects …

Abstract Most Integrated Circuits (ICs) are now heterogeneous Systems-on-Chip (SoC) that
contain a variety of hardware accelerators. These dedicated accelerators execute …

Many classes of applications exhibit significant tolerance to inaccuracies in their
computations. Some examples include image processing, multimedia applications, and …