High rate packets transmission on Ethernet LAN using commodity hardware
A Barczyk, D Bortolotti, A Carbone… - IEEE transactions on …, 2006 - ieeexplore.ieee.org
We report on measurements performed to test the reliability of high rate data transmission
over copper Gigabit Ethernet for the LHCb online system. High reliability of such …
over copper Gigabit Ethernet for the LHCb online system. High reliability of such …
High-performance IPv6 forwarding algorithm for multi-core and multithreaded network processor
X Hu, X Tang, B Hua - Proceedings of the eleventh ACM SIGPLAN …, 2006 - dl.acm.org
IP forwarding is one of the main bottlenecks in Internet backbone routers, as it requires
performing the longest-prefix match at 10Gbps speed or higher. IPv6 forwarding further …
performing the longest-prefix match at 10Gbps speed or higher. IPv6 forwarding further …
Design and performance evaluation of a Programmable Packet Processing Engine (PPE) suitable for high-speed network processors units
In this paper, we present a Programmable Packet Processing Engine suitable for deep
header processing in high-speed networking systems. The engine, which has been …
header processing in high-speed networking systems. The engine, which has been …
基于ForCES 体系结构的IPv6 路由器的研究与实现
王宝生， 夏毅， 陈晓梅， 赵锋 - 2006 - journal.nudt.edu.cn
分析了开放网络体系结构研究现状, 并在ForCES 体系框架下提出一个OpenRouter
路由器结构模型, 该模型由四个逻辑层次组成, 三个标准的API 对路由器进行功能模块化分离 …
路由器结构模型, 该模型由四个逻辑层次组成, 三个标准的API 对路由器进行功能模块化分离 …
FlexPath NP: a network processor concept with application-driven flexible processing paths
R Ohlendorf, A Herkersdorf, T Wild - Proceedings of the 3rd IEEE/ACM …, 2005 - dl.acm.org
In this paper, we present a new architectural concept for network processors called FlexPath
NP. The central idea behind FlexPath NP is to systematically map network processor (NP) …
NP. The central idea behind FlexPath NP is to systematically map network processor (NP) …
PR03: a hybrid NPU architecture
I Papaefstathiou, S Perissakis, TG Orphanoudakis… - IEEE Micro, 2004 - ieeexplore.ieee.org
As the telecommunications industry recovers from the severe downturn of recent years, data
traffic continues to exhibit a rate of increase that outpaces advances in VLSI technology …
traffic continues to exhibit a rate of increase that outpaces advances in VLSI technology …
Queue management in network processors
I Papaefstathiou, T Otphanoudakis… - … Automation and Test …, 2005 - ieeexplore.ieee.org
One of the main bottlenecks when designing a network processing system is very often its
memory subsystem. This is mainly due to the state-of-the-art network links operating at very …
memory subsystem. This is mainly due to the state-of-the-art network links operating at very …
Considering processing cost in network simulations
In many network simulations and models the cost of processing a packet is considered
negligible or overly simplified. The functionality of routers is steadily increasing and complex …
negligible or overly simplified. The functionality of routers is steadily increasing and complex …
Measuring memory access latency for software objects in a NUMA system-on-chip architecture
D Genius - 2013 8th International Workshop on Reconfigurable …, 2013 - ieeexplore.ieee.org
We consider streaming applications modeled as a set of tasks communicating via channels.
These channels are mapped to on-chip memory of a multi-processor system on chip …
These channels are mapped to on-chip memory of a multi-processor system on chip …
The role of network processors in active networks
A Kind, R Pletka, M Waldvogel - IFIP International Working Conference on …, 2003 - Springer
Network processors (NPs) implement a balance between hardware and software that
addresses the demand of performance and programmability in active networks (AN). We …
addresses the demand of performance and programmability in active networks (AN). We …