High-performance packet classification algorithm for multithreaded IXP network processor

D Liu, Z Chen, B Hua, N Yu, X Tang - ACM Transactions on Embedded …, 2008 - dl.acm.org
Packet classification is crucial for the Internet to provide more value-added services and
guaranteed quality of service. Besides hardware-based solutions, many software-based …

Evaluating dynamic task mapping in network processor runtime systems

X Huang, T Wolf - IEEE Transactions on Parallel and …, 2008 - ieeexplore.ieee.org
Modern network processor systems require the ability to adapt their processing capabilities
at runtime to changes in network traffic. Traditionally, network processor applications have …

[引用][C] 网络处理器中处理单元的设计与实现

李诚, 李华伟 - 计算机工程, 2007

A high-throughput network processor architecture for latency-critical applications

S Roy, A Kaushik, R Agrawal, J Gergen, W Rouwet… - IEEE Micro, 2019 - ieeexplore.ieee.org
This article presents the recent advancements on the Advanced IO Processor (AIOP), a
network processor architecture designed by NXP Semiconductors. The AIOP is a multicore …

[HTML][HTML] An Adaptive Throughput-First Packet Scheduling Algorithm for DPDK-Based Packet Processing Systems

C Li, L Song, X Zeng - Future Internet, 2021 - mdpi.com
The continuous increase in network traffic has sharply increased the demand for high-
performance packet processing systems. For a high-performance packet processing system …

Network processor design: issues and challenges

F Khunjush, MW El-Kharashi, KF Li… - 2003 IEEE Pacific …, 2003 - ieeexplore.ieee.org
Since the deployment of the ARPANET in the 60s and the local area networks, Intranets, and
the Internet in the 70s and 80s, research investigation and commercial product …

Network programming interface in general-purpose multi-core processor: A survey

J Yan, C Jia, L Tang, T Li, G Lv… - … on Computer Science …, 2020 - ieeexplore.ieee.org
Recently, the development and deployment of dedicated hardware can hardly keep pace
with the increasing complexity of the network functions. With the performance improvement …

[PDF][PDF] System-level timing analysis and scheduling for embedded packet processors

S Chakraborty - 2003 - research-collection.ethz.ch
Packet processors are high-perfonnance, programmable devices with special architectural
features that are optimized for network packet processing. They are mostly embedded within …

[引用][C] DCS: 一种实现NDN 内容缓存的新方法

黄斌, 毛健彪, 何俊峰, 孙志刚 - 小型微型计算机系统, 2013

[PDF][PDF] 下一代网络处理器及应用综述

赵玉宇, 程光, 刘旭辉, 袁帅, 唐路 - 软件学报, 2020 - jos.org.cn
网络处理器作为能够完成路由查找, 高速分组处理以及QoS 保障等主流业务的网络设备核心
计算芯片, 可以结合自身可编程性完成多样化分组处理需求, 适配不同网络应用场景 …