Quiesce reconfigurable data processor
R Prabhakar, MK Shah, P Nataraja… - US Patent …, 2024 - Google Patents
A reconfigurable data processor comprises an array of configurable units configurable to
allocate a plurality of sets of configurable units in the array to implement respective …
allocate a plurality of sets of configurable units in the array to implement respective …
Efficient bitstream compression
Z Chen - US Patent 7,511,641, 2009 - Google Patents
According to one embodiment of the invention, a method of generating a compressed
configuration bitstream for a programmable logic device comprises encoding the most …
configuration bitstream for a programmable logic device comprises encoding the most …
Processing apparatus and an operation control information update system employing the processing apparatus
T Masuda - US Patent 6,173,397, 2001 - Google Patents
A photographic processing machine comprises a machine control block and an information
control block, in which the photographic processing machine performs a specified operation …
control block, in which the photographic processing machine performs a specified operation …
Microcontroller architecture including a predefined logic area and customizable logic areas
A Vergnes - US Patent App. 11/412,317, 2007 - Google Patents
A microcontroller architecture in accordance with this invention provides modules or circuitry
that may be programmed with a protocol for communication or other application. The …
that may be programmed with a protocol for communication or other application. The …
Flexible apparatus for setting configurations using an EEPROM
WC Tseng, HM Yeh - US Patent 6,816,918, 2004 - Google Patents
US PATENT DOCUMENTS ration instruction is fetched from the EEPROM when it is
determined that the network device should be updated. The 5,423,015 A 6/1995 Chung at …
determined that the network device should be updated. The 5,423,015 A 6/1995 Chung at …
PLD editor and method for editing PLD code
T Song, Z Wei, F Malaspina, H Li, Z Chen - US Patent 9,805,153, 2017 - Google Patents
Technology for editing PLD code to be programmed into a PLD are provided. The
technology includes an interface, a storage system, and a processing system configured to …
technology includes an interface, a storage system, and a processing system configured to …
PLD editor and method for editing PLD code
T Song, Z Wei, F Malaspina, H Li, Z Chen - US Patent 9,112,493, 2015 - Google Patents
A PLD editor and method for editing PLD code to be programmed into a PLD are provided.
The PLD editor includes an interface, a storage system, and a processing system configured …
The PLD editor includes an interface, a storage system, and a processing system configured …
Apparatus and methods for communicating with programmable devices
R Xia, JC Joyce, N Prasad, K Veenstra… - US Patent …, 2013 - Google Patents
(57) ABSTRACT A circuit arrangement includes a programmable logic device. The
programmable logic device includes configuration logic circuitry. The programmable logic …
programmable logic device includes configuration logic circuitry. The programmable logic …
Serial configuration interface
TD Brumett Jr - US Patent 8,138,796, 2012 - Google Patents
(57) ABSTRACT A serial configuration interface (SCI) used to configure a device is
disclosed. A device that support SCI includes a first connector configured to receive a first …
disclosed. A device that support SCI includes a first connector configured to receive a first …
Method and system for using logical values to represent sequence of oscillation periods of a modulated clock signal in time synchronized measurement system
S Foerster, S Schmack, M Schuricht… - US Patent …, 2013 - Google Patents
(57) ABSTRACT A time synchronized measurement system has a master device and a slave
device. The master device and the slave device each have a time measurement device for …
device. The master device and the slave device each have a time measurement device for …