A Novel Scheme for Full Bottom Dielectric Isolation in Stacked Si Nanosheet Gate-All-Around Transistors
J Yang, Z Huang, D Wang, T Liu, X Sun, L Qian, Z Pan… - Micromachines, 2023 - mdpi.com
In this paper, a novel scheme for source/drain-first (S/D-first) full bottom dielectric isolation
(BDI), ie, Full BDI_Last, with integration of a sacrificial Si0. 5Ge0. 5 layer was proposed and …
(BDI), ie, Full BDI_Last, with integration of a sacrificial Si0. 5Ge0. 5 layer was proposed and …
Effect of Non-Ideal Cross-Sectional Shape on the Performance of Nanosheet-Based FETs
In this article, the effects of non-ideal cross-sectional shapes of stacked nanosheet FET
(NSFET) and nanosheet FET with inter-bridge channel (TreeFET) are studied through …
(NSFET) and nanosheet FET with inter-bridge channel (TreeFET) are studied through …
Design Technology Co-Optimization for Gate-All-Around Nanosheet Transistors Considering Source/Drain Confinement and Post-Gate Single Diffusion Break
D Wang, T Liu, X Sun, Z Huang, L Qian… - … on Electron Devices, 2024 - ieeexplore.ieee.org
In this work, a novel self-aligned source/drain confinement (SA-SDC) scheme is proposed to
enable the downsizing of gate-all-around (GAA) nanosheet (NS) field-effect transistors …
enable the downsizing of gate-all-around (GAA) nanosheet (NS) field-effect transistors …
Stacked Si Nanosheets Gate-All-Around Transistors with Silicon-on-Nothing Structure for Suppressing Parasitic Effects and Improving Circuits' Performance
L Li, L Cao, X Zhang, Q Li, M Zhang, Z Wu… - ECS Journal of Solid …, 2024 - iopscience.iop.org
We propose a novel silicon-on-nothing (SON) structure with an air sub-fin for suppressing
the parasitic channel effects on stacked Si nanosheets (NS) gate-all-around (GAA) …
the parasitic channel effects on stacked Si nanosheets (NS) gate-all-around (GAA) …
[引用][C] Random Dopant Fluctuation 에의한FD-SOI GAAFET 의소자성능산포분석
장은교， 신창환 - 대한전자공학회학술대회, 2023 - dbpia.co.kr
Using FD-SOI (fully-depleted silicon-oninsulator) device structure for gate-all-around FET
(GAAFET), the device performance of the GAAFET can be improved. For the GAAFET, the …
(GAAFET), the device performance of the GAAFET can be improved. For the GAAFET, the …