High-speed LDPC decoders towards 1 Tb/s
Beyond 5G systems are expected to approach 1 Tb/s throughput. This poses a significant
challenge to the channel decoder. In this paper, we propose a multi-core architecture based …
challenge to the channel decoder. In this paper, we propose a multi-core architecture based …
A survey on programmable LDPC decoders
Low-density parity-check (LDPC) block codes are popular forward error correction schemes
due to their capacity-approaching characteristics. However, the realization of LDPC …
due to their capacity-approaching characteristics. However, the realization of LDPC …
Low computational-complexity SOMS-algorithm and high-throughput decoder architecture for QC-LDPC codes
A Verma, R Shrestha - IEEE Transactions on Vehicular …, 2022 - ieeexplore.ieee.org
This article proposes a simplified offset min-sum (SOMS) decoding algorithm for the QC-
LDPC codes. It is an implementation-friendly algorithm based on a new logarithmic …
LDPC codes. It is an implementation-friendly algorithm based on a new logarithmic …
Review on 5G NR LDPC code: recommendations for DTTB system
The freeze of the 5th generation new radio (5G NR) Release 16 indicates that 5G
development has stepped into a new stage. The application of a dedicated low-density …
development has stepped into a new stage. The application of a dedicated low-density …
A 520k (18900, 17010) array dispersion LDPC decoder architectures for NAND flash memory
KC Ho, CL Chen, HC Chang - IEEE transactions on very large …, 2015 - ieeexplore.ieee.org
Although Latin square is a well-known algorithm to construct low-density parity-check
(LDPC) codes for satisfying long code length, high code-rate, good correcting capability, and …
(LDPC) codes for satisfying long code length, high code-rate, good correcting capability, and …
Design of rotated QAM mapper/demapper for the DVB-T2 standard
Signal space diversity (SSD) has been lately adopted into the second generation of the
terrestrial digital video broadcasting standard DVB-T2. While spectrally efficient, SSD …
terrestrial digital video broadcasting standard DVB-T2. While spectrally efficient, SSD …
An 847–955 Mb/s 342–397 mW Dual-Path Fully-Overlapped QC-LDPC Decoder for WiMAX System in 0.13 m CMOS
B Xiang, D Bao, S Huang, X Zeng - IEEE Journal of Solid-State …, 2011 - ieeexplore.ieee.org
This paper presents a partially-parallel dual-path fully-overlapped QC-LDPC decoder for the
WiMAX system. By adopting five techniques including symmetrical six-stage pipelining …
WiMAX system. By adopting five techniques including symmetrical six-stage pipelining …
Robust video data hiding using forbidden zone data hiding and selective embedding
Video data hiding is still an important research topic due to the design complexities involved.
We propose a new video data hiding method that makes use of erasure correction capability …
We propose a new video data hiding method that makes use of erasure correction capability …
Jointly optimized quasi-cyclic LDPC codes for coded-cooperative wireless networks based on split labeling diversity
C Chen, F Yang, H Xu - Telecommunication Systems, 2024 - Springer
This manuscript proposes the quasi-cyclic low-density parity-check (QC-LDPC) coded-
cooperative scheme based on the split labeling diversity (QC-LDPCC-SLD) with a single …
cooperative scheme based on the split labeling diversity (QC-LDPCC-SLD) with a single …
A 115mw 1Gbps QC-LDPC decoder ASIC for WiMAX in 65nm cmos
X Peng, Z Chen, X Zhao, D Zhou… - IEEE Asian Solid-State …, 2011 - ieeexplore.ieee.org
Structured quasi-cyclic low-density parity-check (QC-LDPC) code is a part of many emerging
wireless communication standards, such as WiMAX, WiFi and WPAN. This paper presents a …
wireless communication standards, such as WiMAX, WiFi and WPAN. This paper presents a …