Register file segments for supporting code block execution by using virtual cores instantiated by partitionable engines

M Abdallah - US Patent 9,842,005, 2017 - Google Patents
A system for executing instructions using a plurality of register file segments for a processor.
The system includes a global front end scheduler for receiving an incoming instruction …

System and Method for Performing Dynamic Request Routing Based on Broadcast Source Request Information

LB Arimilli, RK Arimilli, BC Drerup… - US Patent App. 12 …, 2009 - Google Patents
A system and method for performing dynamic request rout ing based on broadcast Source
request information are pro vided. Each processor chip in the system may use a synchro …

Method for dependency broadcasting through a source organized source view data structure

M Abdallah - US Patent 10,275,255, 2019 - Google Patents
(57) ABSTRACT A method for dependency broadcasting through a source organized source
view data structure. The method includes receiving an incoming instruction sequence using …

System and method for dynamically supporting indirect routing within a multi-tiered full-graph interconnect architecture

LB Arimilli, RK Arimilli, R Rajamony - US Patent 7,840,703, 2010 - Google Patents
(57) ABSTRACT A method, computer program product, and system are pro vided for
dynamically routing data through the data process ing system. Data is received at a first …

Cluster-wide system clock in a multi-tiered full-graph interconnect architecture

LB Arimilli, RK Arimilli, BC Drerup, JB Joyner… - US Patent …, 2011 - Google Patents
5,602,839 A 2/1997 Annapareddy et al. 2004/0190517 A1 9/2004 Gupta et al. 5,613,068 A
3/1997 Gregg et al. ck 2004/0193612 A1* 9/2004 Chang............................. 707/10 5,629,928 …

Method for dependency broadcasting through a block organized source view data structure

M Abdallah - US Patent 9,934,042, 2018 - Google Patents
A method for dependency broadcasting through a block organized source view data
structure. The method includes receiving an incoming instruction sequence using a global …

Enhanced network virtualization using metadata in encapsulation header

P Garg, AJ Ritz, SE Bensley… - US Patent …, 2019 - Google Patents
In a network virtualization system, metadata is passed in an encapsulation header from one
network virtualization edge to another network virtualization edge or to a service con nected …

Executing instruction sequence code blocks by using virtual cores instantiated by partitionable engines

M Abdallah - US Patent 9,766,893, 2017 - Google Patents
A method for executing instructions using a plurality of virtual cores for a processor. The
method includes receiving an incoming instruction sequence using a global front end …

Methods, systems and apparatus for predicting the way of a set associative cache

M Abdallah, R Rao, K Avudaiyappan - US Patent 9,904,625, 2018 - Google Patents
A method for predicting a way of a set associative shadow cache is disclosed. As a part of a
method, a request to fetch a first far taken branch instruction of a first cache line from an …

Method for performing dual dispatch of blocks and half blocks

M Abdallah - US Patent 9,811,342, 2017 - Google Patents
A method for executing dual dispatch of blocks and half blocks. The method includes
receiving an incoming instruction sequence using a global front end; grouping the …