Making full use of the capabilities of the FPGA as an accelerator is difficult for non hardware
experts, especially if partial reconfiguration is to be employed. One of the issues that arise is …

MPSoCs são sistemas multiprocessados integrados na forma de um SoC. Eles são
tendência no projeto de circuitos VLSI, pois minimizam a crise de produtividade de projeto …

In this work, we present a solution to a common problem encountered when using FPGAs in
dynamic, ever-changing environments. Even when using dynamic function exchange to …

Field programmable gate arrays (FPGAs) potentially offer enhanced reliability, recovery from
failures through partial and dynamic reconfigurations, and eliminate the need for redundant …

Distributed Computing projects such as SETI@ home or distributed. net have demonstrated
how supercomputer performance can be achieved by the use of thousands of linked …

With CPU performance scaling having decelerated significantly with the end of frequency
scaling due to the power ceiling the industry has started to look into alternative accelerators …

We present a new model for dynamic reconfiguration costs. The model targets both,
reconfiguration time and data. Reconfiguration is modeled at the granularity of …

Well-known for its efficient computing capabilities, FPGA-based architectures also have the
potential for high flexibility with dynamic reconfiguration features. Yet, writing applications on …

This paper presents a new technique to be used in the context of reconfigurable computing
to accelerate the online diagnosis of permanent damage on Xilinx FPGAs using Built-In Self …

Dynamic partial run-time reconfiguration of FPGAs allows implementing novel mechanisms
for self-adapting and self-healing in robust fault-tolerant embedded systems. In this thesis …