SRAM cell design challenges in modern deep sub-micron technologies: An overview

W Gul, M Shams, D Al-Khalili - Micromachines, 2022 - mdpi.com
Microprocessors use static random-access memory (SRAM) cells in the cache memory
design. As a part of the central computing component, their performance is critical. Modern …

A survey on two-dimensional Error Correction Codes applied to fault-tolerant systems

D Freitas, C Marcon, J Silveira, L Naviner… - Microelectronics …, 2022 - Elsevier
The number of memory faults operating in radiation environments increases with the
electronic device miniaturization. One-dimensional (1D) Error Correction Codes (ECCs) are …

Protection of associative memories using combined tag and data parity (CTDP)

S Liu, P Reviriego, F Lombardi - IEEE Transactions on …, 2020 - ieeexplore.ieee.org
As emerging memories are utilized in processors as main memory, they must also coexist
with CMOS memories; for instance SRAMs, are used to implement smaller, but faster …

Exploiting asymmetry in eDRAM errors for redundancy-free error-tolerant design

S Liu, P Reviriego, J Guo, J Han… - IEEE Transactions on …, 2019 - ieeexplore.ieee.org
For some applications, errors have a different impact on data and memory systems
depending on whether they change a zero to a one or the other way around; for an unsigned …

Sscfm: Separate signature-based control flow error monitoring for multi-threaded and multi-core environments

K Choi, D Park, J Cho - Electronics, 2019 - mdpi.com
Soft error is a key challenge in computer systems. Without soft error mitigation, control flow
error (CFE) can lead to system crash. Signature-based CFE monitoring scheme is a …

[PDF][PDF] SRAM Cell Design Challenges in Modern Deep Sub-Micron Technologies: An Overview. Micromachines 2022, 13, 1332

W Gul, M Shams, D Al-Khalili - 2022 - academia.edu
Microprocessors use static random-access memory (SRAM) cells in the cache memory
design. As a part of the central computing component, their performance is critical. Modern …

Enhancing flexible unequal error control method to improve soft error tolerance

M Atik Shahariar, M Islam, MS Sadi… - … of International Conference …, 2020 - Springer
Because of soft error, the reliability of modern computing systems is facing many problems.
As the area of application increases, the demand for detecting and correcting soft errors …

Partial-TMR: A New Method for Protecting Register Files Against Soft Error Based on Lifetime Analysis

XG Liang, YK Gao, GX Hua - Journal of Computer Science and …, 2021 - Springer
High-energy particles in the space can easily cause soft error in register file (RF). As a
critical structure in a processor, RF often stores data for long periods of time and is read …

[PDF][PDF] Error Correction codes Derived from Orthogonal Latin Square codes

A Bhargav, Y Varthamanan - researchgate.net
The developments in IC technology and rapid increase of transistor densities and scaling
factor, the use of ECC's acquired prominence. Multiple bit errors in memories due to …