Analysis of the propagation time of a rumour in large-scale distributed systems

Y Mocquard, B Sericola, S Robert… - 2016 IEEE 15th …, 2016 - ieeexplore.ieee.org
The context of this work is the well studied dissemination of information in large scale
distributed networks through pairwise interactions. This problem, originally called rumor …

Performance evaluation of 6T, 7T & 8T SRAM at 180 nm technology

M Kumar, JS Ubhi - 2017 8th international conference on …, 2017 - ieeexplore.ieee.org
The high-speed system and shrinkage in technology lead to more complexity with higher
power dissipation. This paper presents the design, simulation and analysis of 6T, 7T and 8T …

Design of 7T FinFET based SRAM cell design for nanometer regime

G Sneha, BH Krishna, CA Kumar - … International conference on …, 2017 - ieeexplore.ieee.org
In this paper a 7T FinFET totally differential SRAM cell is designed to achieve stronger
switching ability. For read operation P-type gates used for data analysis and transmission …

Design of a memory array using tail transistor and sleep transistor based 7T SRAM with low short circuit and standby power

R Krishnaraj, B Soundarya, S Mythili… - IOP Conference Series …, 2021 - iopscience.iop.org
The display hardware concentrates on planning low power control gadgets due to the
utilization of versatile battery-powered gadgets. Ultra low energy process of memory clusters …

SRAM Design Issues and Effective Panacea at Different CMOS Technology Nodes

M Sharma, A Gupta, V Goyal - 2022 31st Conference of Open …, 2022 - ieeexplore.ieee.org
In this paper authors analyze comprehensively the 6T SRAM cell. Solutions for different 6T
design issues are also reported. While covering these solutions authors have accounted for …

Design and Simulation of Power efficient SRAM

N Pannu, NR Prakash - 2021 2nd International Conference for …, 2021 - ieeexplore.ieee.org
Portable or handheld devices are growing at a fast pace nowadays and that is motivating
designers to go for advanced low power circuit designs. The challenge is to reduce the …

[PDF][PDF] Low voltage high speed 8T SRAM cell for ultra-low power applications

ASST Kumar, BVV Satyanarayana - Int. J. Eng. Technol, 2018 - academia.edu
The usage of portable devices increasing rapidly in the modern life has led us to focus our
attention to increase the performance of the SRAM circuits, especially for low power …

Design of a Sleep Transistor and Read, Write Separation based 6T SRAM Memory Array for Low Power IOT Applications

R Krishnaraj, T Senthil, N Vikram… - … and Robotics (STCR …, 2021 - ieeexplore.ieee.org
IOT based applications are nearly rule the entire embedded based machines and industries
nowadays. IOT based devices use lots and lots of memories to store multiple datum in the …

Analyzing the Low Power Techniques in SRAM Cells at 45nm Node Technology

S Dhariwal, AK Thomas, R Korah… - 2024 IEEE 4th …, 2024 - ieeexplore.ieee.org
This paper presents Gated Vdd and MTCMOS techniques to achieve low power from the
simulated static random-access memory (SRAM) cells. These techniques are implemented …

[PDF][PDF] Design of low power SRAM cell using 10transistors

M Madhumalini, R Iyshvarya - J VLSI Design Sign Process, 2019 - core.ac.uk
The primary aim of electronics is to design low power devices due to the frequent usage of
powered widget. The memory cell operation containing low voltage consumption …