Design of a low power Digital Down Converter for 802.16 m-4G WiMAX on FPGA

SR Rupanagudi, VG Bhat… - … on Advances in …, 2014 - ieeexplore.ieee.org
The Digital Down Converter also known as the DDC is one of the most integral parts of a
baseband wireless receiver system. The major function of the DDC is to down convert an …

BPSK Modulation‐Based Local Oscillator‐Free IQ Demodulation for Millimeter Wave Imaging

Q Zheng, Y Jian, L Wang, Z Ma, X Li, C Song… - Journal of …, 2021 - Wiley Online Library
The precision of local oscillator (LO) signal in in‐phase and quadrature (IQ) demodulation
strongly affects the imaging performance of millimeter wave (mmWave) radars. Therefore, to …

[PDF][PDF] Datasets design of gate diffusion input based pipeline architecture for numerically controlled oscillator

RR Gujjula, C Perumal, P Kodali… - Indonesian Journal of …, 2022 - academia.edu
Gate diffusion input (GDI) is a technique, which enables reducing power consumption, area
and delay in the digital circuits significantly, at the same time maintains low complexity of the …

A method of full digital clock generation with adjustable frequency and phase

YN Lou, ZH Jin, CJ Zhang - Applied Mechanics and Materials, 2014 - Trans Tech Publ
In modern electronic systems, a reliable clock with precise frequency is a fundamental
requirement. Moreover, the frequency and phase of the clock needs to be adjustable in …

[PDF][PDF] Design and FPGA Implementation of Digital Frequency Modulation Receiver

K Shazly, ME Ghoneim, S Kumar - researchgate.net
In this paper, we introduce the design of a digital frequency modulation receiver using
FPGA. The main component in the design is digital phase locked loop (DPLL) which …

Unidirectional rotating coordinate rotation digital computer algorithm based on rotational phase estimation

C Zhang, J Han, H Yan - Review of Scientific Instruments, 2015 - pubs.aip.org
The improved coordinate rotation digital computer (CORDIC) algorithm gives high precision
and resolution phase rotation, but it has some shortages such as high iterations and big …

[PDF][PDF] Design and Implementation of Real-Time 16-bit Fast Fourier Transform using Numerically Controlled Oscillator and Radix-4 DITFFT Algorithm in VHDL

P Pateriya, A Chaora - International Research Journal of …, 2016 - academia.edu
This paper addresses the real-time demand of 16-bit FFT processor exploitation Numerically
Controlled Oscillator (NCO) and devoted radix-4 Decimation-In-Time FFT in modern digital …

Area-optimized RVDT/LVDT Signal Conditioner Based-on CORDIC

JY Lee - JOURNAL OF SEMICONDUCTOR TECHNOLOGY …, 2020 - dbpia.co.kr
This paper proposes a new area-optimized signal conditioner (SC) structure, which obtains
the angular or the linear position information from a rotary variable differential transformer …

[PDF][PDF] Design and Implementation of a Dynamic Partial Reconfigurable Demodulation System for Satellite Receivers

MEMMG Keshk - 2018 - kyutech.repo.nii.ac.jp
The collaboration among countries in space field promotes the financial efficiency and
political sustainability. The space faring nations have most of the responsibility to enhance …

Design and implementation of baseband digital adaptive FM demodulator

YM Sreesha, BS Rao, SN Jain… - … Conference on Circuits …, 2017 - ieeexplore.ieee.org
With the advent of technology, the communication has been majorly into digital domain, the
modulation and demodulation schemes are mostly implemented in this domain. Also, the …