In the many-core era, scalable coherence and on-chip interconnects are crucial for shared
memory processors. While snoopy coherence is common in small multicore systems …

Chip multiprocessors (CMPs) and systems-on-chip (SOCs) are expected to grow in core
count from, a few today to hundreds or more. Since efficient on-chip communication is a …

The prevalence of multicore architectures has accentuated the need for scalable cache
coherence solutions. Many of the proposed designs use a mix of 1-to-1, 1-to-many (1-to-M) …

Applications' traffic tends to be bursty and the location of hot-spot nodes moves as time goes
by. This will significantly aggregate the blocking problem of wormhole-routed Network-on …

Packet-switched networks-on-chip (NoC) have been proposed as an efficient
communication infrastructure for multi-core architectures. Adding virtual channels to a NoC …

Virtual channels (VC) and multiple physical (MP) networks are two alternative methods to
provide better performance, support quality-of-service, and avoid protocol deadlocks in …

As the core count in shared-memory manycores keeps increasing, it is becoming
increasingly harder to design cache-coherence protocols that deliver high performance …

Although snoop-based coherence protocols provide fast cache-to-cache transfers with a
simple and robust coherence mechanism, scaling the protocols has been difficult due to the …

With transistor miniaturization leading to an abundance of on-chip resources and
uniprocessor designs providing diminishing returns, the industry has moved beyond single …

Recent work has argued that sequential consistency (SC) in GPUs can perform on par with
weak memory models, provided ordering stalls are made less frequent by relaxing ordering …