On the dynamic reconfigurable implementations of MISTY1 and KASUMI block ciphers

H Jiexian, Y Khizar, ZA Ali, R Hasan, MS Pathan - Plos one, 2023 - journals.plos.org
Novel hardware architectures for dynamic reconfigurable implementation of 64-bit MISTY1
and KASUMI block ciphers are proposed to enhance the performance of cryptographic chips …

Power-efficient secured hardware design of aes algorithm on high performance fpga

K Kumar, V Singh, G Mishra, BR Babu… - … and Informatics (IC3I …, 2022 - ieeexplore.ieee.org
With the expansion and growth of industries, the two major issues exist that affect both
civilization and the environment. Technology development has made it more difficult to …

[PDF][PDF] Implementation of Novel Power Efficient AES Design on High Performance FPGA

Y Aditya, K Kumar - NeuroQuantology, 2022 - researchgate.net
In the age of Information and Communication Technology (ICT), the globe is much
concerned about two major challenges that are secured data transmission and power …

[PDF][PDF] Implementation of High-Performance AES Crypto Processor for Green Communication

Y Aditya, K Kumar - Telematique, 2022 - researchgate.net
The world is intensely concerned about two vital issues in the Information and
Communication Technology (ICT) era: energy efficiency and secure data transfer. This …

Federated Learning Based Smart Horticulture and Smart Storage of Fruits Using E-Nose, and Blockchain: A Proposed Model

S Seilov, B Pandey, A Nurzhaubayev… - 2024 IEEE 3rd …, 2024 - ieeexplore.ieee.org
The main objective of this project is to increase the productivity of farmers producing fruits
and vegetables in Kazakhstan. We are planning to use technology during production at …

Cloud Cryptography: Mechanism of Different Encryption Standards

R Lanke, AMJMZ Rahman, R Bhardwaj… - … on Computing for …, 2024 - ieeexplore.ieee.org
The term “cloud cryptography” describes the application of cryptographic methods and
protocols to protect communications and data in cloud computing settings. The provision of …

LVCMOS Based Low Power Implementation of DES Encryption Algorithm on 28nm FPGA

AK Singh, TK Jain, P Pandey… - 2024 3rd International …, 2024 - ieeexplore.ieee.org
The main objective of Input/Output (IO) standard is to match the impedance of input and
output port along with FPGA device. During our research, we observe that different IO …

Real life implementation of an energy-efficient adaptive advance encryption design on FPGA

N Bisht, B Pandey, SK Budhani - International Journal of …, 2023 - inderscienceonline.com
Advanced encryption standards (AES) is a mainstream algorithm regularly employed by
numerous applications for encryption and decryption purposes. A significant disadvantage …

Online Education Big Data Encryption Algorithm System Based on Artificial Intelligence

Q Liu - Proceedings of the 2023 International Conference on …, 2023 - dl.acm.org
With the rapid development of online education, a large amount of educational data is
transmitted and stored on the network. This data includes sensitive information about …