A 200-GHz Power Amplifier With a Wideband Balanced Slot Power Combiner and 9.4-dBm P sat in 65-nm CMOS: Embedded Power Amplification

H Bameri, O Momeni - IEEE Journal of Solid-State Circuits, 2021 - ieeexplore.ieee.org
The effect of gain and embedding of amplifying cells (amp-cell) on the output power of
power amplifiers (PAs) at high mm-wave frequencies is studied. This is the frequency range …

A 60-GHz SiGe power amplifier with three-conductor transmission-line-based Wilkinson baluns and asymmetric directional couplers

Y Gong, JD Cressler - IEEE Transactions on Microwave Theory …, 2020 - ieeexplore.ieee.org
A compact, 60-GHz high-power, wideband balanced power amplifier, implemented in a 90-
nm SiGe BiCMOS technology, is demonstrated. A three-conductor transmission-line-based …

Space-compliant design of a millimeter-wave GaN-on-Si stacked power amplifier cell through electro-magnetic and thermal simulations

C Ramella, M Pirola, C Florian, P Colantonio - Electronics, 2021 - mdpi.com
The stacked power amplifier is a widely adopted solution in CMOS technology to overcome
breakdown limits. Its application to compound semiconductor technology is instead rather …

A Highly Linear and Efficient -Band CMOS Power Amplifier Using Hybrid NMOS/PMOS for Double Nonlinearity Cancellation With Four-Way Distributed-Active …

TW Li, S Li, HM Lavasani… - IEEE Journal of Solid-State …, 2024 - ieeexplore.ieee.org
This article presents a-band (ie, 47-75 GHz) differential four-way distributed-active-
transformer (DAT) power amplifier (PA), which uses hybrid NMOS/PMOS for double …

A 62-GHz High-Efficiency Power Amplifier With Modulation Capability via Back-Gate in 22-nm FD-SOI

X Xu, J Wagner, F Ellinger - IEEE Solid-State Circuits Letters, 2023 - ieeexplore.ieee.org
This letter presents a feasibility study for a 62-GHz power amplifier (PA) in a 22-nm CMOS
technology with integrated data modulation via the back-gate. The proposed PA consists of …

A 21-dBm 3.7 W/mm² 28.7% PAE 64-GHz power amplifier in 22-nm FD-SOI

M Cui, C Carta, F Ellinger - IEEE Solid-State Circuits Letters, 2020 - ieeexplore.ieee.org
This letter presents the design of a 64-GHz power amplifier (PA) in a 22-nm FD-SOI CMOS
technology. Benefiting from optimized pseudodifferential cascode gain cells as well as the …

A balanced power amplifier with asymmetric coupled-line couplers and Wilkinson baluns in a 90 nm SiGe BiCMOS technology

Y Gong, JD Cressler - 2020 IEEE/MTT-S International …, 2020 - ieeexplore.ieee.org
This work presents the design of a high power, two-stage, wideband, balanced power
amplifier (PA) implemented in a 90 nm SiGe BiCMOS technology. Asymmetric coupled-line …

A 28-GHz 20.4-dBm CMOS power amplifier with adaptive common-gate cross feedback linearization

J Yoo, S Hong - 2021 IEEE MTT-S International Microwave …, 2021 - ieeexplore.ieee.org
A 28-GHz power amplifier (PA) with adaptive cross feedback (ACF) is presented. The ACF is
employed by an adaptively controllable RC-feedback circuit from the source to the opposite …

A 38-48 GHz Power Amplifier with 23-dB Gain 18.5-dBm Psat and 28% PAE in 65-nm CMOS

R Chen, L Zhang, Y Wang - … on Solid-State & Integrated Circuit …, 2022 - ieeexplore.ieee.org
A Q-band power amplifier (PA) with broadband as well as high output power and power-
added efficiency (PAE) is presented. The circuit adopts a pseudo-differential push-pull …

[PDF][PDF] KEY FRONT-END CIRCUITS IN MILLIMETER-WAVE SILICON-BASED WIRELESS TRANSMITTERS FOR PHASED-ARRAY APPLICATIONS

TW Li - 2020 - core.ac.uk
The device output voltage and current waveforms are essential for optimizing the device-
level PA performance, eg, output power, efficiency, or linearity. A harmonicallytuned PA with …