Neuro-inspired computing chips

W Zhang, B Gao, J Tang, P Yao, S Yu, MF Chang… - Nature …, 2020 - nature.com
The rapid development of artificial intelligence (AI) demands the rapid development of
domain-specific hardware specifically designed for AI applications. Neuro-inspired …

Memory devices and applications for in-memory computing

A Sebastian, M Le Gallo, R Khaddam-Aljameh… - Nature …, 2020 - nature.com
Traditional von Neumann computing systems involve separate processing and memory
units. However, data movement is costly in terms of time and energy and this problem is …

Model compression and hardware acceleration for neural networks: A comprehensive survey

L Deng, G Li, S Han, L Shi, Y Xie - Proceedings of the IEEE, 2020 - ieeexplore.ieee.org
Domain-specific hardware is becoming a promising topic in the backdrop of improvement
slow down for general-purpose processors due to the foreseeable end of Moore's Law …

A modern primer on processing in memory

O Mutlu, S Ghose, J Gómez-Luna… - … computing: from devices …, 2022 - Springer
Modern computing systems are overwhelmingly designed to move data to computation. This
design choice goes directly against at least three key trends in computing that cause …

A configurable cloud-scale DNN processor for real-time AI

J Fowers, K Ovtcharov, M Papamichael… - 2018 ACM/IEEE 45th …, 2018 - ieeexplore.ieee.org
Interactive AI-powered services require low-latency evaluation of deep neural network
(DNN) models-aka"" real-time AI"". The growing demand for computationally expensive …

PUMA: A programmable ultra-efficient memristor-based accelerator for machine learning inference

A Ankit, IE Hajj, SR Chalamalasetti, G Ndu… - Proceedings of the …, 2019 - dl.acm.org
Memristor crossbars are circuits capable of performing analog matrix-vector multiplications,
overcoming the fundamental energy efficiency limitations of digital logic. They have been …

[图书][B] Efficient processing of deep neural networks

V Sze, YH Chen, TJ Yang, JS Emer - 2020 - Springer
This book provides a structured treatment of the key principles and techniques for enabling
efficient processing of deep neural networks (DNNs). DNNs are currently widely used for …

Neural cache: Bit-serial in-cache acceleration of deep neural networks

C Eckert, X Wang, J Wang… - 2018 ACM/IEEE …, 2018 - ieeexplore.ieee.org
This paper presents the Neural Cache architecture, which re-purposes cache structures to
transform them into massively parallel compute units capable of running inferences for Deep …

[HTML][HTML] Analog architectures for neural network acceleration based on non-volatile memory

TP Xiao, CH Bennett, B Feinberg, S Agarwal… - Applied Physics …, 2020 - pubs.aip.org
Analog hardware accelerators, which perform computation within a dense memory array,
have the potential to overcome the major bottlenecks faced by digital hardware for data …

Benchmarking a new paradigm: Experimental analysis and characterization of a real processing-in-memory system

J Gómez-Luna, I El Hajj, I Fernandez… - IEEE …, 2022 - ieeexplore.ieee.org
Many modern workloads, such as neural networks, databases, and graph processing, are
fundamentally memory-bound. For such workloads, the data movement between main …