Advanced features and industrial applications of FPGAs—A review

JJ Rodríguez-Andina, MD Valdes-Pena… - IEEE Transactions on …, 2015 - ieeexplore.ieee.org
Field programmable gate arrays (FPGAs) have established themselves as one of the
preferred digital implementation platforms in a plethora of current industrial applications, and …

Performance characterization and design guidelines for efficient processor–FPGA communication in Cyclone V FPSoCs

RF Molanes, JJ Rodríguez-Andina… - IEEE Transactions on …, 2017 - ieeexplore.ieee.org
Field programmable systems-on-chip (FPS-oCs) are heterogeneous reconfigurable
platforms consisting of hard processors and FPGA fabric. They provide software designers …

A novel design of adaptive and hierarchical convolutional neural networks using partial reconfiguration on fpga

M Farhadi, M Ghasemi, Y Yang - 2019 IEEE High Performance …, 2019 - ieeexplore.ieee.org
Nowadays most research in visual recognition using Convolutional Neural Networks (CNNs)
follows the “deeper model with deeper confidence” belief to gain a higher recognition …

Analyzing the impact of fault-tolerance methods in arm processors under soft errors running linux and parallelization apis

GS Rodrigues, F Rosa, ÁB de Oliveira… - … on Nuclear Science, 2017 - ieeexplore.ieee.org
This paper presents an analysis of the efficiency of traditional fault-tolerance methods on
parallel systems running on top of Linux OS. It starts by studying the occurrence of software …

A dynamic partial reconfigurable overlay concept for PYNQ

B Janßen, P Zimprich, M Hübner - 2017 27th International …, 2017 - ieeexplore.ieee.org
Partial reconfiguration is a promising technique in the design of embedded systems since it
enables an increase in efficiency and flexibility. However, its usage is still challenging due to …

A run-time reconfiguration method for an FPGA-based electrical capacitance tomography system

D Wanta, WT Smolik, J Kryszyn, P Wróblewski… - Electronics, 2022 - mdpi.com
A desirable feature of an electrical capacitance tomography system is the adaptation
possibility to any sensor configuration and measurement mode. A run-time reconfiguration of …

RV-CAP: Enabling dynamic partial reconfiguration for FPGA-based RISC-V system-on-chip

N Charaf, A Kamaleldin, M Thümmler… - 2021 IEEE …, 2021 - ieeexplore.ieee.org
Partial reconfiguration is remaining the core technique to build adaptive systems-on-chip
(SoCs) for modern FPGA architectures. Current support for reconfiguration management …

Low power image processing applications on FPGAs using dynamic voltage scaling and partial reconfiguration

A Podlubne, J Haase, L Kalms, G Akgün… - 2018 Conference on …, 2018 - ieeexplore.ieee.org
The TULIPP project aims to facilitate the development of embedded image processing
systems with real-time and low-power constraints. In this paper, several adaptive dynamic …

A low-power SoC-based moving target detection system for amphibious spherical robots

S Pan, L Shi, S Guo, P Guo, Y He… - 2015 IEEE International …, 2015 - ieeexplore.ieee.org
A moving target detection and tracking system is critical important for autonomous mobile
robot to accomplish complicated tasks. Aiming at application requirements of our …

Characterization of FPGA-master ARM communication delays in Cyclone V devices

RF Molanes, F Salgado, J Fariña… - IECON 2015-41st …, 2015 - ieeexplore.ieee.org
FPGAs have evolved from hardware accelerators to very powerful System-on-Chip
platforms, mainly thanks to the availability of increasingly powerful embedded processors …