The recent Spectre attack first showed how to inject incorrect branch targets into a victim
domain by poisoning microarchitectural branch prediction history. In this paper, we …

Modern architectures rely on memory fences to prevent undesired weakenings of memory
consistency. As the fences' semantics may be subtle, the automation of their placement is …

Java's memory model was recently updated and expanded with new access modes. The
accompanying documentation for these access modes is intended to make strong …

Runtime Verification (RV) is a lightweight formal method which consists in verifying that an
execution of a program is correct wrt a specification. The specification formalizes with …

Abstract The C/C++ 11 (C11) standard offers a spectrum of ordering guarantees on memory
access operations. The combinations of such orderings pose a challenge in developing …

To enhance performance, common processors feature relaxed memory models that reorder
instructions. However, the correctness of concurrent programs is often dependent on the …

Ensuring that our increasingly complicated distributed systems are simultaneously reliable
and efficient is challenging. Rigorous formal analyses can help make the design and …

Synchronization algorithms that provide the transaction interface are intricate. We present an
algorithm description language that explicitly captures the type of the used synchronization …

Concurrency is ubiquitous. Concurrent processing improves the speed of execution, and
offers better resource utilization. However, the analysis of concurrent programs is …

Abstract The Relaxed Memory Calculus (RMC) is a novel approach for portable lowlevel
concurrent programming in the presence of the the relaxed memory behavior caused by …