Semiconductor on insulator structure comprising a plasma oxide layer and method of manufacture thereof

SJ Kweskin - US Patent 10,573,550, 2020 - Google Patents
US10573550B2 - Semiconductor on insulator structure comprising a plasma oxide layer and
method of manufacture thereof - Google Patents US10573550B2 - Semiconductor on insulator …

Power gating for three dimensional integrated circuits (3DIC)

CJ Chao, LIN Chou-Kun, YC Tsai, YH Lin… - US Patent …, 2018 - Google Patents
(74) Attorney, Agent, or Firm—Slater Matsil, LLP (57) ABSTRACT Embodiments of
mechanisms for forming power gating cells and virtual power circuits on multiple active …

High resistivity silicon-on-insulator substrate comprising a charge trapping layer formed on a substrate with a rough surface

I Peidous, AM Jones, S Kommu, G Wang… - US Patent …, 2019 - Google Patents
A multilayer composite structure and a method of preparing a multilayer composite structure
are provided. The multilayer composite structure comprises a semiconductor handle …

Method of manufacturing silicon germanium-on-insulator

G Wang, SG Thomas - US Patent 10,332,782, 2019 - Google Patents
The disclosed method is suitable for producing a SiGe-on-insulator structure. According to
some embodiments of the method, a layer comprising SiGe is deposited on silicon-on …

Multiplexer-memory cell circuit, layout thereof and method of manufacturing same

CC Wang - US Patent 9,755,651, 2017 - Google Patents
the present inventions are directed to an integrated circuit, and layout thereof, including a
multiplexer—memory cell circuit wherein input-selection of the multiplexer is determined by …

Two-stage top source drain epitaxy formation for vertical field effect transistors enabling gate last formation

A Reznicek, CC Yeh, Z Liu, R Xie - US Patent 11,164,787, 2021 - Google Patents
A semiconductor structure including a bottom source drain region arranged on a substrate, a
semiconductor channel region extending vertically upwards from a top surface of the bottom …

3D semiconductor device and structure with memory

Z Or-Bach, B Cronquist, DC Sekar - US Patent 11,443,971, 2022 - Google Patents
NOESYZHRGYRDHS-UHFFFAOYSA-N insulin Chemical compound N1C (= O) C (NC (= O)
C (CCC (N)= O) NC (= O) C (CCC (O)= O) NC (= O) C (C (C) C) NC (= O) C (NC (= O) CN) C …

Method of depositing charge trapping polycrystalline silicon films on silicon substrates with controllable film stress

G Wang, JL Libbert, SG Thomas, I Peidous - US Patent 10,658,227, 2020 - Google Patents
A semiconductor on insulator multilayer structure is provided. The multilayer comprises a
high resistivity single crystal semiconductor handle substrate, a textured oxide, nitride, or …

High resistivity silicon-on-insulator structure and method of manufacture thereof

JL Libbert, Q Liu, G Wang, AM Jones - US Patent 11,145,538, 2021 - Google Patents
US11145538B2 - High resistivity silicon-on-insulator structure and method of manufacture thereof
- Google Patents US11145538B2 - High resistivity silicon-on-insulator structure and method of …

High resistivity silicon-on-insulator substrate comprising an isolation region

I Peidous, JL Libbert - US Patent 10,475,695, 2019 - Google Patents
(57) ABSTRACT A multilayer composite structure and a method of preparing a multilayer
composite structure are provided. The multilayer composite structure comprises a …