Moore's law has driven the continuous miniaturization of transistor size over the years. This
has led to breakthroughs in the domain of computers (desktops, servers, supercomputers …

Due to power and clocking constraints, integrating more processing cores onto a single chip,
instead of increasing the frequency has become the norm in modern processor design. This …

In this chapter, we present snooping coherence protocols. Snooping protocols were the first
widely-deployed class of protocols and they continue to be used in a variety of systems …

Los continuos avances en la escala de integración permiten reducir cada vez más el
tamaño de los transistores y, por tanto, cada vez podemos encontrar chips con un mayor …

We design a 16-entry destination reorder buffer (DRB) that is used in timestamp snooping
for Symmetric Multiprocessor (MSP) servers. The reorder buffer, as the interface between the …

Traditionally, cache coherence in largescale shared-memory multiprocessors has been
ensured by means of a distributed directory structure stored in main memory. In this way, the …

The paper describes the use of a distributed group communication system to support
consultation and collaboration among a group of people in a network of international …

Page 1 Page 1 Page 1 ECE 259 / CPS 221 Advanced Computer Architecture II (Parallel
Computer Architecture) Introduction Copyright 2006 Daniel J. Sorin Duke University Slides …

Communication misses-those serviced by dirty data in remote caches-are a pressing
performance limiter in shared-memory multiprocessors. Recent research has indicated that …

The relentless quest for processing speeds in the range of Teraflops and beyond has
accelerated the need for scalable, parallel, High-Performance Computing (HPC) systems …