A review of new time-to-digital conversion techniques

S Tancock, E Arabul, N Dahnoun - IEEE transactions on …, 2019 - ieeexplore.ieee.org
Time-to-digital converters (TDCs) are vital components in time and distance measurement
and frequency-locking applications. There are many architectures for implementing TDCs …

Recent developments and design challenges of high-performance ring oscillator CMOS time-to-digital converters

Z Cheng, X Zheng, MJ Deen… - IEEE Transactions on …, 2015 - ieeexplore.ieee.org
Time-to-digital converters (TDCs) are increasingly used as building blocks in biomedical
imaging, digital communication, and measurement instrumentation systems. When …

[图书][B] Time-to-digital converter basics

S Henzler, S Henzler - 2010 - Springer
On the basis of a generic mixed-signal system the scaling difficulties of analog and mixed-
signal circuits based on a signal representation in the voltage domain are discussed for …

All-digital PLL and transmitter for mobile phones

RB Staszewski, JL Wallberg, S Rezeq… - IEEE journal of Solid …, 2005 - ieeexplore.ieee.org
We present the first all-digital PLL and polar transmitter for mobile phones. They are part of a
single-chip GSM/EDGE transceiver SoC fabricated in a 90 nm digital CMOS process. The …

Waveform calibration using built in self test mechanism

S Chakraborty, J Graul - US Patent 9,176,188, 2015 - Google Patents
A system on a chip (SoC) includes a transceiver comprising a transmitter having a power
amplifier and a receiver having a signal buffer. At least one of the transmitter and receiver …

Re-thinking analog integrated circuits in digital terms: A new design concept for the IoT era

P Toledo, R Rubino, F Musolino… - IEEE Transactions on …, 2021 - ieeexplore.ieee.org
A steady trend towards the design of mostly-digital and digital-friendly analog circuits,
suitable to integration in mainstream nanoscale CMOS by a highly automated design flow …

Analysis and design of voltage-controlled oscillator based analog-to-digital converter

J Kim, TK Jang, YG Yoon… - IEEE Transactions on …, 2009 - ieeexplore.ieee.org
A voltage-controlled oscillator (VCO) based analog-to-digital converter (ADC) is a time-
based architecture with a first-order noise-shaping property, which can be implemented …

A 2.9–4.0-GHz Fractional-N Digital PLL With Bang-Bang Phase Detector and 560- Integrated Jitter at 4.5-mW Power

D Tasca, M Zanuso, G Marzin… - IEEE Journal of Solid …, 2011 - ieeexplore.ieee.org
This paper introduces a ΔΣ fractional-N digital PLL based on a single-bit TDC. A digital-to-
time converter, placed in the feedback path, cancels out the quantization noise introduced …

The path to the software-defined radio receiver

AA Abidi - IEEE Journal of solid-state circuits, 2007 - ieeexplore.ieee.org
After being the subject of speculation for many years, a software-defined radio receiver
concept has emerged that is suitable for mobile handsets. A key step forward is the …

A highly linear broadband CMOS LNA employing noise and distortion cancellation

WH Chen, G Liu, B Zdravko… - IEEE Journal of Solid …, 2008 - ieeexplore.ieee.org
A broadband inductorless low-noise amplifier (LNA) design that utilizes simultaneous noise
and distortion cancellation is presented. Concurrent cancellation of the intrinsic third-order …