Deterministic synthesis of hybrid application-specific network-on-chip topologies

V Todorov, D Mueller-Gritschneder… - … on Computer-Aided …, 2014 - ieeexplore.ieee.org
Networks-on-Chip (NoCs) enable cost-efficient and effective communication between the
processing elements inside modern systems-on-chip (SoCs). NoCs with regular topologies …

A detailed power analysis of network-on-chip

AV Bhaskar - 2022 IEEE Delhi Section Conference (DELCON), 2022 - ieeexplore.ieee.org
In a multi-core general purpose processor or System-on-Chip, interconnection network plays
a very important role. An on-chip interconnection network or Network-on-Chip may be …

Theseus: Towards High-Efficiency Wafer-Scale Chip Design Space Exploration for Large Language Models

J Zhu, C Xue, Y Chen, Z Wang, G Sun - arXiv preprint arXiv:2407.02079, 2024 - arxiv.org
The emergence of the large language model~(LLM) poses an exponential growth of
demand for computation throughput, memory capacity, and communication bandwidth. Such …

OPAIC: An optimization technique to improve energy consumption and performance in application specific network on chips

M Taassori, M Taassori, S Niroomand, B Vizvári… - Measurement, 2015 - Elsevier
Abstract Network on Chip (NoC) is an appropriate and scalable solution for today's System
on Chips (SoCs) with the high communication demands. Application specific NoCs is …

LPNet: A DNN based latency prediction technique for application mapping in network-on-chip design

R Sambangi, H Manghnani… - Microprocessors and …, 2021 - Elsevier
Analytical models used for latency estimation of Network-on-Chip (NoC) are not producing
reliable accuracy. This makes these analytical models difficult to use in optimization of …

An iterative computational technique for performance evaluation of networks-on-chip

S Foroutan, Y Thonnart, F Petrot - IEEE Transactions on …, 2012 - ieeexplore.ieee.org
The trend toward integrated many-core architectures makes the network-on-chip (NoC)
technology, the on-chip communication infrastructure of choice. However, and as opposed …

A Reliability System Evaluation Model of NoC Communication with Crosstalk Analysis from Backend to Frontend

X Weng, X Lin, Y Liu, C Xu, L Zhan, S Wang, D Chen… - Micromachines, 2023 - mdpi.com
Network on chip (NoC) is the main solution to the communication bandwidth of a multi-
processor system on chip (MPSoC). NoC also brings more route requirements and is highly …

Composable worst-case delay bound analysis using network calculus

Y Long, Z Lu, H Shen - … on Computer-Aided Design of Integrated …, 2017 - ieeexplore.ieee.org
Performance analysis is playing an indispensable role in design and evaluation for on-chip
networks. In former studies, the end-to-end delay bound is calculated by the equivalent …

A Machine Learning Mapping Algorithm for NoC Optimization

X Weng, Y Liu, C Xu, X Lin, L Zhan, S Wang, D Chen… - Symmetry, 2023 - mdpi.com
Network on chip (NoC) is a promising solution to the challenge of multi-core System-on-Chip
(SoC) communication design. Application mapping is the first and most important step in the …

Delta multi-stage interconnection networks for scalable wireless on-chip communication

S Mnejja, Y Aydi, M Abid, S Monteleone, V Catania… - Electronics, 2020 - mdpi.com
The Network-on-Chip (NoC) paradigm emerged as a viable solution to provide an efficient
and scalable communication backbone for next-generation Multiprocessor Systems-on …