A Low-Leakage Body-Guarded Analog Switch in 0.35- BiCMOS and Its Applications in Low-Speed Switched-Capacitor Circuits
JJ Su, KS Demirci, O Brand - IEEE Transactions on Circuits and …, 2015 - ieeexplore.ieee.org
A low-leakage body-guarded analog switch (BGswitch) for slow switched-capacitor (SC)
circuits is presented. The improvement of accuracy in SC circuits employing BG-switches is …
circuits is presented. The improvement of accuracy in SC circuits employing BG-switches is …
New power gated SRAM cell in 90nm CMOS technology with low leakage current and high data stability for sleep mode
N Meena, AM Joshi - 2014 IEEE International Conference on …, 2014 - ieeexplore.ieee.org
Static Random Access Memory (SRAM) is the most popular circuit which is used in all
processors and occupies the considerable area of the chip. The total power consumption of …
processors and occupies the considerable area of the chip. The total power consumption of …
[PDF][PDF] Analysis of high-performance near-threshold dual mode logic design
P Bikki - International Journal of Electronics and …, 2019 - journals.pan.pl
A novel dual mode logic (DML) model has a superior energy-performance compare to
CMOS logic. The DML model has unique feature that allows switching between both modes …
CMOS logic. The DML model has unique feature that allows switching between both modes …
Low power and high performance multi-Vth dual mode logic design
P Bikki, P Karuppanan - 2016 11th International Conference on …, 2016 - ieeexplore.ieee.org
The unique feature of the dual mode logic (DML) model is its switching ability between static
and dynamic modes of operation according to the system required. In dynamic mode, the …
and dynamic modes of operation according to the system required. In dynamic mode, the …
[PDF][PDF] Comparative study on single gate MOSFET and double gate MOSFET
Semiconductor is a crystalline element or compound where electrons placed in district
condition. This material has two types of bands, conduction band, and valance band, a gap …
condition. This material has two types of bands, conduction band, and valance band, a gap …
[PDF][PDF] Low-Power High-Speed Double Gate 1-bit Full Adder Cell
In this paper, we proposed an efficient full adder circuit using 16 transistors. The proposed
high-speed adder circuit is able to operate at very low voltage and maintain the proper …
high-speed adder circuit is able to operate at very low voltage and maintain the proper …
Analysis of low power feed through logic with leakage control technique
P Bikki, P Karuppanan - 2017 4th International Conference on …, 2017 - ieeexplore.ieee.org
In this article, novel leakage control techniques are adopted in Feed-Through Logic (FTL) for
low power high-speed designs. The FTL design has a unique feature; the outputs are …
low power high-speed designs. The FTL design has a unique feature; the outputs are …
一种新型低漏功耗数据保持触发器设计
邬杨波， 董恒锋， 雷师节 - 无线通信技术, 2015 - cqvip.com
在无线通信系统中, 随着集成电路特征尺寸的不断缩小, 芯片漏功耗急剧增大,
漏功耗减小技术已成为低功耗无线通信系统设计技术的焦点之一. 针对基于功控技术的触发器在 …
漏功耗减小技术已成为低功耗无线通信系统设计技术的焦点之一. 针对基于功控技术的触发器在 …
[PDF][PDF] A literature survey and investigation of various high performance domino logic circuits
J Muralidharan, P Manimegalai - ARPN Journal of Engineering and …, 2016 - academia.edu
In deep sub-micron regions, the dynamic power and abstaining reliability problems will be
reduced when the power supply voltage was trimmed down. The consumption of power in …
reduced when the power supply voltage was trimmed down. The consumption of power in …
Super-Threshold FinFET Full Adders for Low-Power and High-Speed Applications.
Y Wu, J Hu, Y Zhang - Electrotehnica, Electronica …, 2015 - search.ebscohost.com
A low-power scheme named as super-threshold computing is proposed to reduce energy
dissipations of FinFET circuits with a small performance penalty. Unlike near-threshold …
dissipations of FinFET circuits with a small performance penalty. Unlike near-threshold …