Sub-10 nm two-dimensional transistors: Theory and experiment

R Quhe, L Xu, S Liu, C Yang, Y Wang, H Li, J Yang… - Physics Reports, 2021 - Elsevier
Presently Si-based field-effect transistors (FETs) are approaching their physical limit, and
further scaling their gate length down to the sub-10 nm region is becoming extremely …

Ferroelectric negative capacitance field effect transistor

L Tu, X Wang, J Wang, X Meng… - Advanced Electronic …, 2018 - Wiley Online Library
With the progress in silicon circuit miniaturization, lowering power consumption becomes the
major objective. Supply voltage scaling in ultralarge‐scale integration (ULSI) is limited by …

Negative Capacitance FET With 1.8-nm-Thick Zr-Doped HfO2 Oxide

D Kwon, S Cheema, N Shanker… - IEEE Electron …, 2019 - ieeexplore.ieee.org
We report on negative capacitance FETs (NCFETs) with a 1.8-nm-thick Zr-doped HfO 2 gate
oxide layer fabricated on an FDSOI wafer. Hysteresis-free operation is demonstrated. When …

Engineering negative differential resistance in NCFETs for analog applications

H Agarwal, P Kushwaha, JP Duarte… - … on Electron Devices, 2018 - ieeexplore.ieee.org
In negative capacitance field-effect transistors (NCFETs), drain current may decrease with
increasing in the saturation region, leading to negative differential resistance (NDR). While …

Energy-efficient transistors: suppressing the subthreshold swing below the physical limit

Y Zhai, Z Feng, Y Zhou, ST Han - Materials Horizons, 2021 - pubs.rsc.org
With the miniaturization of silicon-based electronic components, power consumption is
becoming a fundamental issue for micro–nano electronic circuits. The main reason for this is …

Proposal for capacitance matching in negative capacitance field-effect transistors

H Agarwal, P Kushwaha, YK Lin… - IEEE Electron …, 2019 - ieeexplore.ieee.org
Negative-capacitance transistors use ferroelectric (FE) material in the gate-stack to improve
the transistor performance. The extent of the improvement depends on the capacitance …

Recent advances in negative capacitance FinFETs for low-power applications: a review

V Chauhan, DP Samajdar - IEEE Transactions on Ultrasonics …, 2021 - ieeexplore.ieee.org
In the contemporary era of Internet-of-Things (IoT), there is an extensive search for
competent devices which can operate at ultralow voltage supply. Due to the restriction of …

Evaluation of 10-nm bulk FinFET RF performance—Conventional versus NC-FinFET

R Singh, K Aditya, SS Parihar… - IEEE Electron …, 2018 - ieeexplore.ieee.org
In this letter, we have investigated the RF performance of a negative capacitance FinFET
(NC-FinFET) using BSIM-CMG compact model extracted from DC and RF measured data of …

Numerical investigation of short-channel effects in negative capacitance MFIS and MFMIS transistors: Above-threshold behavior

G Pahwa, A Agarwal… - IEEE Transactions on …, 2019 - ieeexplore.ieee.org
In this paper, we analyze the impact of length scaling on the ON-state operation of the two
classes of double-gate negative capacitance transistors: metal-ferroelectric-metal-insulator …

Analysis and modeling of inner fringing field effect on negative capacitance FinFETs

YK Lin, H Agarwal, P Kushwaha… - … on Electron Devices, 2019 - ieeexplore.ieee.org
We investigate the impact of inner fringing fields on the negative capacitance FinFET (NC-
FinFET) and how this scales with the technology node. The 8-/7-nm technology node of the …