A review on the state of the art of dynamic voltage restorer: topologies, operational modes, compensation methods, and control algorithms

MS Shah, MF Ullah, D Nouman, MA Khan… - Engineering …, 2024 - iopscience.iop.org
Enhancing and regulating power quality is a fundamental necessity in any industry reliant on
power, aiming for the optimal utilization of resources. The power quality challenges …

A charge-based analytical model for gate all around junction-less field effect transistor including interface traps

P Raut, U Nanda - ECS Journal of Solid State Science and …, 2022 - iopscience.iop.org
This article proposes an analytic charge-based model that incorporates interface trapping.
The model's applicability to all operating zones includes various interface trap charges with …

A machine learning framework for predicting physical properties in configuration space of gate alloys

D Chen, S Li, T Tao, S Li, D Liu, X Liu… - Materials Today …, 2023 - Elsevier
In materials design, it is meaningful to fast and accurately predict material properties
required for a specific application based on specific structures. In the present study, a …

Small signal model parameter extraction for cylindrical silicon-on-insulator Schottky barrier MOSFET

A Saxena, M Kumar, RK Sharma, RS Gupta - Microsystem Technologies, 2023 - Springer
Small-signal model of the MOSFET is an equivalent circuit of its electric components, which
defines the electrical characteristics of a MOSFET. The non-quasi-static (NQS) model is one …

RF and linearity parameters analysis of 20 nm gate-all-around gate-stacked junction-less accumulation mode MOSFET for low power circuit applications

J Kumar, AN Mahajan, SS Deswal, A Saxena… - Microsystem …, 2024 - Springer
For low-power circuit applications, the performance of the circuit is significantly influenced by
the MOSFET's analog/RF and non-linearity properties. Gate-all-around junction-less …

Low temperature passivation of silicon surfaces for enhanced performance of Schottky-barrier MOSFET

J Molina-Reyes, AM Cuellar-Juarez - Nanotechnology, 2023 - iopscience.iop.org
By using a simple device architecture along with a simple process design and a low thermal-
budget of a maximum of 100 C for passivating metal/semiconductor interfaces, a Schottky …

Device Design and Modeling of Fin Field Effect Transistor for Low Power Applications

U Soma, E Suresh, B Balaji, B Ramadevi - … of 5th ICICC 2021, Volume 2, 2022 - Springer
Fin field effect transistor (FinFET) is the newest technology compared to metal oxide
semiconductor field effect transistors (FET), and we designed various structures of FinFETs …

Compact modeling of junctionless gate-all-around MOSFET for circuit simulation: Scope and challenges

B Smaani, F Nafa, AK Upadhyay, S Labiod… - Device Circuit Co …, 2024 - taylorfrancis.com
Complementary metal-oxide-semiconductor (CMOS) technology has reached its physical
and technical limits during the last few years, and as a consequence, various architectures …

MOSFET: Device Physics and Operation

R Balachandran, SM Sharma… - … : Current Trends and …, 2024 - Wiley Online Library
Metal–oxide–semiconductor field‐effect transistor (MOSFET) device structures and its
predecessors replaced vacuum tubes of nineteenth century and bipolar transistors of 1950s …