Analog/mixed-signal machine learning (ML) accelerators exploit the unique computing
capability of analog/mixed-signal circuits and inherent error tolerance of ML algorithms to …

Current systems hide data movement from software behind the load-store interface.
Software's inability to observe and respond to data movement is the root cause of many …

State-of-the-art taxonomic profilers that comprise the first step in larger-context metagenomic
studies have proven to be computationally intensive, ie, while accurate, they come at the …

The performance and capacity of solid-state drives (SSDs) are continuously improving to
meet the increasing demands of modern data-intensive applications. Unfortunately …

In spite of several recent advancements, data movement in modern CNN accelerators
remains a significant bottleneck. Architectures like Eyeriss implement large scratchpads …

An eight-core 64-b processor extends RISC-V to perform multiply–accumulate (MAC) within
the shared last level cache (LLC). Instead of moving data from the LLC to the core, compute …

As multicore systems continue to grow in scale and on-chip memory capacity, the on-chip
network bandwidth and latency become problematic bottlenecks. Because of this …

Silicon-based semiconductor transistors are approaching their physical limits due to
shrinking feature sizes. Simultaneously, traditional silicon-based von Neumann …

Energy efficient architecture is essential to improve both the performance and power
consumption of a computer system. However, modern computers suffer from the severe …

Computer systems designers are building cache hierarchies with higher capacity to capture
the ever-increasing working sets of modern workloads. Cache hierarchies with higher …