Reliable computer systems employ error control codes (ECCs) to protect information from errors. For example, memories are frequently protected using single error correction-double …
Frequently, soft errors occur due to striking of radioactive particles in memory cells which reduce the reliability of memory systems. Generally, single error correction-double error …
J Li, P Reviriego, L Xiao, Z Liu, L Li, A Ullah - Microelectronics Reliability, 2019 - Elsevier
In recent years, there has been a growing interest in codes that can correct adjacent bit errors in memories. This is due to the increasing percentage of radiation induced errors that …
J Kim, S Kwon, J Noh, DJ Shin - IEEE Transactions on Circuits …, 2022 - ieeexplore.ieee.org
Single device data correction (SDDC) is a main reliability, availability, and serviceability feature of DRAM systems in servers due to the significant hard-failure rate associated with …
K Namba, F Lombardi - IEEE Transactions on Computers, 2018 - ieeexplore.ieee.org
Many systems have critical bits which must be decoded at high speeds; for example, flags to mark the start and end of a packet (SOP and EOP) determine subsequent actions, thus they …
DS Kim, CS Chae - US Patent 10,700,712, 2020 - Google Patents
A semiconductor device includes a controller and a memory device. The controller includes a processor configured to process a request from an external apparatus, an interface …
In the last decade, a number of Single Error Correction Double Adjacent Error Correction (SEC-DAEC) codes have been proposed to protect memories against Multiple Cell Upsets …
Single error correction (SEC) codes have been employed to protect the data bits as well as control bits in wireless sensor networks (WSNs) for Internet of Things (IoT) applications. In …
In recent years, both radiation induced faults and power consumption have become important factors to consider when designing circuits for space applications. These faults …