Continuously reducing transistor sizes and aggressive low power operating modes employed by modern architectures tend to increase transient error rates. Concurrently …
L Duan, Y Zhang, B Li, L Peng - (IEEE ISPASS) IEEE …, 2011 - ieeexplore.ieee.org
High-performance processors suffer from soft error vulnerability due to the increasing on- chip transistor density, shrinking processor feature size, lower threshold voltage, etc. In this …
L Duan, Y Zhang, B Li, L Peng - IEEE Transactions on …, 2013 - ieeexplore.ieee.org
Soft errors have been significantly degrading the reliability of current processors whose feature sizes and supply voltages are fast scaling down. In this paper, we propose two …
The described embodiments include a program code testing system that determines the vulnerability of multi-threaded program code to soft errors. For multi-threaded program code …
Integrating the large number of transistor in a single chip leads to significant improvement on the performance of processors. More performance is achieved by putting multiple CPU cores …
The sustained drive to downsize the transistors has reached a point where device sensitivity against transient faults due to neutron and alpha particle strikes aka soft errors has moved to …
With the scale down of transistor sizes and higher frequencies with low power modes in modern architectures, the chip components become more susceptible to transient errors …
Executing multiple applications concurrently is an important way of utilizing the computational power provided by emerging chip multiprocessor (CMP) architectures …
B Sanderson, D Zappala - 2009 Proceedings of 18th …, 2009 - ieeexplore.ieee.org
One of the main goals of BitTorrent is to reduce load on Web servers by encouraging clients to share content between themselves. However, BitTorrent's current design relies heavily on …